Patents by Inventor Keisuke Nishida

Keisuke Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230397828
    Abstract: A vital-sign detection device for detecting a vital sign, the vital-sign detection device including: a cuff; a bladder at least partly made from a stretchable sheet material on an inside of the cuff, the bladder being dimensioned to fit onto a body part of a wearer; and at least one sensor that includes an electronic element arranged in and/or on the stretchable sheet material of the bladder in a location so as to be pressed onto the body part by deformation of the bladder.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 14, 2023
    Inventors: Marc J. van Houwelingen, Hayato KATSU, Keisuke NISHIDA, Yui NAKAMURA, Ryo ASAI
  • Patent number: 11797741
    Abstract: A non-transitory computer-readable recording medium storing a timing library creation program of causing a computer to execute processing, the processing including: extracting, from a delay variation database that stores delay variation values of gates included in circuit design data, a delay variation value, out of the delay valuation values matching to characteristics which are characteristics of one of signal paths in the circuit design data and which include a threshold voltage, a drive force, and a number of gate stages of the signal path; calculating an extended delay variation coefficient based on the extracted delay variation value and the characteristics; and creating, based on a basic timing library in which the delay variation value is not reflected and the extended delay variation coefficient, an extended timing library in which the delay variation value is reflected.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: October 24, 2023
    Assignee: FUJITSU LIMITED
    Inventor: Keisuke Nishida
  • Patent number: 11659654
    Abstract: A stretchable wiring board that includes: a stretchable substrate; a first wiring line on the stretchable substrate; an insulating layer overlapping a first part of the first wiring line in a plan view of the stretchable wiring board; and a second wiring line overlapping the first part of the first wiring line in the plan view with the insulating layer interposed therebetween. The insulating layer has at least one first notch, and in the plan view, the at least one first notch does not overlap the first wiring line and overlaps the second wiring line.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: May 23, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takahito Tomoda, Shinsuke Tani, Takaaki Miyasako, Takayuki Okada, Yui Nakamura, Hayato Katsu, Keisuke Nishida
  • Patent number: 11653445
    Abstract: A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: May 16, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
  • Publication number: 20230073700
    Abstract: A flexible wiring board that includes a flexible substrate; a flexible wiring over the flexible substrate; and a protective layer over the flexible substrate, where the protective layer includes: a first region that overlaps with the flexible wiring and a second region that does not overlap with the flexible wiring as viewed from a thickness direction of the flexible substrate, and a low flexibility part that is higher in flexibility ratio than the first region and is disposed along an extending direction of the flexible wiring in the second region.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 9, 2023
    Inventors: Ryo ASAI, Hayato KATSU, Keisuke NISHIDA
  • Publication number: 20220405452
    Abstract: A non-transitory computer-readable recording medium storing a timing library creation program of causing a computer to execute processing, the processing including: extracting, from a delay variation database that stores delay variation values of gates included in circuit design data, a delay variation value, out of the delay valuation values matching to characteristics which are characteristics of one of signal paths in the circuit design data and which include a threshold voltage, a drive force, and a number of gate stages of the signal path; calculating an extended delay variation coefficient based on the extracted delay variation value and the characteristics; and creating, based on a basic timing library in which the delay variation value is not reflected and the extended delay variation coefficient, an extended timing library in which the delay variation value is reflected.
    Type: Application
    Filed: March 22, 2022
    Publication date: December 22, 2022
    Applicant: FUJITSU LIMITED
    Inventor: Keisuke NISHIDA
  • Publication number: 20220312587
    Abstract: A stretchable wiring board that includes: a stretchable substrate; a first stretchable wiring extending in a length direction on a main surface side of the stretchable substrate; and a second stretchable wiring extending in the length direction on the main surface side of the stretchable substrate, the second stretchable wiring having a first portion with a first region overlapping on top of the first stretchable wiring on an end portion side of the first stretchable wiring, and a width of the first portion of the second stretchable wiring in a width direction orthogonal to the length direction is smaller than a width of the first stretchable wiring.
    Type: Application
    Filed: June 14, 2022
    Publication date: September 29, 2022
    Inventors: Keisuke NISHIDA, Hayato KATSU, Yutaka TAKESHIMA
  • Publication number: 20220183151
    Abstract: An elastic wiring board that includes an elastic substrate; a plurality of electrode wirings having elasticity; and an ion-migration resistant layer between at least a first electrode wiring of the plurality of electrode wirings and the elastic substrate.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 9, 2022
    Inventors: Hayato KATSU, Keisuke NISHIDA, Kentaro USUI
  • Publication number: 20220078904
    Abstract: A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer.
    Type: Application
    Filed: November 16, 2021
    Publication date: March 10, 2022
    Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
  • Patent number: 11212915
    Abstract: A stretchable mounting board that includes a mounting electrode section electrically connected to stretchable wiring, and solder electrically connected to the mounting electrode section. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer, and the concentration of the bismuth in the second electrode layer is constant along a thickness direction thereof.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: December 28, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
  • Publication number: 20210243891
    Abstract: A stretchable wiring board that includes: a stretchable substrate; a first wiring line on the stretchable substrate; an insulating layer overlapping a first part of the first wiring line in a plan view of the stretchable wiring board; and a second wiring line overlapping the first part of the first wiring line in the plan view with the insulating layer interposed therebetween. The insulating layer has at least one first notch, and in the plan view, the at least one first notch does not overlap the first wiring line and overlaps the second wiring line.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 5, 2021
    Inventors: Takahito Tomoda, Shinsuke Tani, Takaaki Miyasako, Takayuki Okada, Yui Nakamura, Hayato Katsu, Keisuke Nishida
  • Publication number: 20210045236
    Abstract: A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer, and the concentration of the bismuth in the second electrode layer is constant along a thickness direction thereof.
    Type: Application
    Filed: October 14, 2020
    Publication date: February 11, 2021
    Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
  • Patent number: 10468115
    Abstract: A processor includes: an error checking and correcting information generating unit; a storage unit configured to store data to which error checking and correcting information and error uncorrectable information are added when an error is detected and configured to store data to which error checking and correcting information is added when an error is not detected; and a processing unit configured to read out all data which the storage unit stores and configured to check an error of each piece of read-out data based on error checking/correcting information added to each piece of all the read-out data when an arithmetic unit detects an error, and configured to correct data in which an error is detected based on error checking and correcting information when a correctable error is detected.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: November 5, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Keisuke Nishida, Shiro Kamoshida
  • Publication number: 20180253354
    Abstract: A processor includes: an error checking and correcting information generating unit; a storage unit configured to store data to which error checking and correcting information and error uncorrectable information are added when an error is detected and configured to store data to which error checking and correcting information is added when an error is not detected; and a processing unit configured to read out all data which the storage unit stores and configured to check an error of each piece of read-out data based on error checking/correcting information added to each piece of all the read-out data when an arithmetic unit detects an error, and configured to correct data in which an error is detected based on error checking and correcting information when a correctable error is detected.
    Type: Application
    Filed: February 15, 2018
    Publication date: September 6, 2018
    Applicant: Fujitsu Limited
    Inventors: Keisuke Nishida, Shiro Kamoshida
  • Patent number: 7073878
    Abstract: A liquid ejecting apparatus of the invention includes: a pressure-generating chamber having an inside space whose volume is changeable, into which a liquid is supplied and which is communicated with a nozzle, a resonance frequency of said pressure-generating chamber having a period of Tc; a signal-generating unit that generates a driving signal having: a first signal-element for causing the pressure-generating chamber to expand, a second signal-element for causing the pressure-generating chamber to contract from an expanding state thereof in order to eject a drop of the liquid through the nozzle, and a third signal-element for causing the pressure-generating chamber to expand to an original state before outputting the first signal-element after the drop of the liquid is ejected; and a pressure-generating unit that causes the pressure-generating chamber to expand and contract, based on the driving signal.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: July 11, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Keisuke Nishida, Junhua Chang
  • Publication number: 20040212646
    Abstract: A liquid ejecting apparatus of the invention includes: a pressure-generating chamber having an inside space whose volume is changeable, into which a liquid is supplied and which is communicated with a nozzle, a resonance frequency of said pressure-generating chamber having a period of Tc; a signal-generating unit that generates a driving signal having: a first signal-element for causing the pressure-generating chamber to expand, a second signal-element for causing the pressure-generating chamber to contract from an expanding state thereof in order to eject a drop of the liquid through the nozzle, and a third signal-element for causing the pressure-generating chamber to expand to an original state before outputting the first signal-element after the drop of the liquid is ejected; and a pressure-generating unit that causes the pressure-generating chamber to expand and contract, based on the driving signal.
    Type: Application
    Filed: September 30, 2003
    Publication date: October 28, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Keisuke Nishida, Junhua Chang
  • Publication number: 20030146742
    Abstract: A first evaluation signal includes a first excitation element adapted to excite pressure fluctuation in liquid contained in the pressure chamber and a first ejection element which follows the excitation element after a first time period to eject a first liquid droplet from the nozzle. A second evaluation signal includes a second excitation element adapted to excite pressure fluctuation in liquid contained in the pressure chamber and a second ejection element which follows the excitation element after a second time period to eject a second liquid droplet from the nozzle which is longer than the first time period. The first evaluation signal is supplied to the pressure generating element to measure a first ejected amount of the first liquid droplet. The second evaluation signal is supplied to the pressure generating element to measure a second ejected amount of the second liquid droplet. An ejected amount ratio of the first ejected amount and the second ejected amount is calculated.
    Type: Application
    Filed: January 15, 2003
    Publication date: August 7, 2003
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Keisuke Nishida, Satoru Hosono, Tomoaki Takahashi, Ryoichi Tanaka, Hirofumi Teramae