Patents by Inventor Keisuke NOMOTO

Keisuke NOMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and semiconductor chip
    Patent number: 9379063
    Abstract: The present invention is applicable to a semiconductor device having a plurality of chips being stacked with a TSV structure in which adjacent ones of the chips are connected to each other via a plurality of through electrodes. Each of the chips includes a plurality of TSV array portions provided so as to correspond to a plurality of channels. The TSV array portions include a TSV array portion that contributes to an input and an output depending upon the number of the chips being stacked, and a pass-through TSV array portion that is not connected to an input/output circuit.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: June 28, 2016
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Keisuke Nomoto, Toru Ishikawa
  • Semiconductor memory device
    Patent number: 9208831
    Abstract: A semiconductor device comprises a first pair of signal lines and a first control circuit. The first control circuit precharges each of the first pair of signal lines to a first voltage in response to a precharge signal, and changes the voltage level of each of the first pair of signal lines to a second voltage different from the first voltage when a deep power down signal is input.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: December 8, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Keisuke Nomoto, Yuji Nakaoka
  • SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CHIP
    Publication number: 20150325521
    Abstract: The present invention is applicable to a semiconductor device having a plurality of chips being stacked with a TSV structure in which adjacent ones of the chips are connected to each other via a plurality of through electrodes. Each of the chips includes a plurality of TSV array portions provided so as to correspond to a plurality of channels. The TSV array portions include a TSV array portion that contributes to an input and an output depending upon the number of the chips being stacked, and a pass-through TSV array portion that is not connected to an input/output circuit.
    Type: Application
    Filed: July 20, 2015
    Publication date: November 12, 2015
    Inventors: Keisuke Nomoto, Toru Ishikawa
  • Semiconductor device and semiconductor chip
    Patent number: 9087555
    Abstract: The present invention is applicable to a semiconductor device having a plurality of chips being stacked with a TSV structure in which adjacent ones of the chips are connected to each other via a plurality of through electrodes. Each of the chips includes a plurality of TSV array portions provided so as to correspond to a plurality of channels. The TSV array portions include a TSV array portion that contributes to an input and an output depending upon the number of the chips being stacked, and a pass-through TSV array portion that is not connected to an input/output circuit.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: July 21, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Keisuke Nomoto, Toru Ishikawa
  • Semiconductor Memory Device
    Publication number: 20150003178
    Abstract: A semiconductor device comprises a first pair of signal lines and a first control circuit. The first control circuit precharges each of the first pair of signal lines to a first voltage in response to a precharge signal, and changes the voltage level of each of the first pair of signal lines to a second voltage different from the first voltage when a deep power down signal is input.
    Type: Application
    Filed: September 16, 2014
    Publication date: January 1, 2015
    Inventors: Keisuke Nomoto, Yuji Nakaoka
  • Semiconductor memory device
    Patent number: 8861299
    Abstract: A semiconductor device comprises a first pair of signal lines and a first control circuit. The first control circuit precharges each of the first pair of signal lines to a first voltage in response to a precharge signal, and changes the voltage level of each of the first pair of signal lines to a second voltage different from the first voltage when a deep power down signal is input.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: October 14, 2014
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Keisuke Nomoto, Yuji Nakaoka
  • SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CHIP
    Publication number: 20130049223
    Abstract: The present invention is applicable to a semiconductor device having a plurality of chips being stacked with a TSV structure in which adjacent ones of the chips are connected to each other via a plurality of through electrodes. Each of the chips includes a plurality of TSV array portions provided so as to correspond to a plurality of channels. The TSV array portions include a TSV array portion that contributes to an input and an output depending upon the number of the chips being stacked, and a pass-through TSV array portion that is not connected to an input/output circuit.
    Type: Application
    Filed: August 16, 2012
    Publication date: February 28, 2013
    Applicant: Elpida Memory, Inc.
    Inventors: Keisuke NOMOTO, Toru ISHIKAWA