Abstract: A method for manufacturing a wiring substrate includes forming a conductor layer including first and second pads, forming a resin insulating layer on the conductor layer, forming, in the insulating layer, a first opening exposing the first pad and a second opening exposing the second pad, forming a covering layer on the insulating layer such that the covering layer covers the first and second openings, forming a third opening in the covering layer such that the third opening communicates with the first opening and the first pad is exposed in the third opening, forming, on a surface of the first pad, a protective film formed of material different from material forming the conductor layer, removing the covering layer from the insulating layer, and forming a conductor post on the second pad such that the conductor post is formed of material that is same as the material forming the conductor layer.

Abstract: A solid-state battery that includes a solid-state battery layered body including a positive electrode layer, a negative electrode layer, and a solid electrolyte interposed between the positive electrode layer and the negative electrode layer, wherein at least one electrode layer of the positive electrode layer and the negative electrode layer has a tapered shape toward an edge of the electrode layer in a sectional view thereof, and the positive electrode layer, the negative electrode layer, and the solid electrolyte are an integrally sintered body.

Abstract: An information processing apparatus includes: a host system; a rectifying element configured to output a signal input to one end to the other end; and a socket configured to connect a peripheral device. The host system is connected to the other end, the socket includes a first signal terminal to which a first signal is input from the peripheral device and a second signal terminal to which a second signal is input from the peripheral device in a case where the socket is connected to the peripheral device, and the first signal terminal is connected to the one end, the first signal has a first voltage higher than a reference potential, the second signal has a second voltage higher than the reference potential in a case where the first voltage is equal to or lower than an operation voltage of the host system.

Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on a first surface of the board, a connector mounted on a second surface of the board on the opposite side with respect to the first surface, an optical element that converts an optical signal and an electrical signal and positioned on the opposite side with respect to the first surface such that the optical element is at least partially embedded in the board, a path that is formed in the board and electrically connects the logic IC on the first surface and the optical element on the opposite side with respect to the first surface, and an optical waveguide that is embedded on the opposite side with respect to the first surface and optically connects the connector on the second surface and the optical element on the opposite side with respect to the first surface.

Abstract: A semiconductor package includes a printed wiring board, a logic IC mounted on the printed wiring board, a connector mounted on the printed wiring board, an optical element that is accommodated inside the printed wiring board and converts an optical signal to an electrical signal and/or the electrical signal to the optical signal, an optical waveguide formed between the optical element inside the printed wiring board and the connector on the printed wiring board such that the optical waveguide optically connects the optical element and the connector, and an electrical path formed between the optical element and the logic IC such that the electrical path connects the logic IC and the optical element and that a length of the electrical path is 1 mm or less.

Abstract: Provided is a solid-state battery capable of further reducing cracks due to expansion of the battery during charging. A solid-state battery includes: a battery element in which a positive electrode layer, a negative electrode layer, and a solid electrolyte layer interposed between the positive electrode layer and the negative electrode layer are stacked; an end-face electrodes provided on an end face of the battery element; and an insulating layer provided between the positive electrode layer or the negative electrode layer and the end-face electrodes, in which the insulating layer contains a heat-resistant resin.

Abstract: Battery pack (10) having a substantially sealed structure includes a plurality of cells (11-16) each having an opened portion provided in order to discharge an internal gas when an internal pressure rises. Non-resettable pressure switch (30, 31) that is connected to controller (50) by a signal line. The pressure switch changes irreversibly from a significant state to a non-significant state when a pressure in battery pack (10) is greater than a predetermined pressure threshold value.

Abstract: A wiring substrate includes a first wiring part including a first insulating layer and a first conductor layer laminated on the first insulating layer, and a second wiring part including a second insulating layer and a second conductor layer laminated on the second insulating layer. The thickness of the second insulating layer is smaller than that of the first insulating layer. The thickness of the second conductor layer is smaller than that of the first conductor layer. The first conductor layer includes first wirings including differential wirings having the minimum wiring width of larger than 5 ?m and minimum inter-wiring distance of larger than 7 ?m. The second conductor layer includes second wirings having the maximum wiring width of 5 ?m or less and the maximum inter-wiring distance of 7 ?m or less. The second part is positioned closer to the outermost surface of the substrate than the first part.

Abstract: A battery pack includes a plurality of bus bars serving to form a plurality of parallel battery structures that each have parallel connection of two or more of a plurality of prismatic batteries. The plurality of bus bars electrically connect the plurality of prismatic batteries to connect the plurality of parallel battery structures in series. The plurality of parallel battery structures connected in series form a battery connection structure that includes a turn causing a reversal of direction of series connection of the plurality of parallel battery structures.

Abstract: A wiring substrate includes a first wiring part including a first insulating layer and a first conductor layer laminated on the first insulating layer, and a second wiring part formed on the first part and including a second insulating layer and a second conductor layer laminated on the second insulating layer. The thickness of the second insulating layer is smaller than that of the first insulating layer. The thickness of the second conductor layer is smaller than that of the first conductor layer. The first conductor layer has a surface on the opposite side with respect to the first insulating layer such that the arithmetic mean roughness of the surface is smaller than that of a surface of the second conductor layer on the opposite side with respect to the second insulating layer. The second part is positioned closer to the outermost surface of the substrate than the first part.

Abstract: A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.

Abstract: A method for manufacturing a wiring substrate includes forming conductor pads on a surface of an insulating layer, positioning, on or in the insulating layer, an electronic component having electrode pads, forming a second insulating layer covering the surface of the insulating layer, conductor pads and electronic component, forming first via holes exposing the conductor pads, applying a first desmear treatment to the second insulating layer such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the electrode pads of the electronic component positioned on or in the insulating layer, applying a second desmear treatment to the second insulating layer such that residues are removed from the second via holes, forming first via conductors in the first via holes, and forming second via conductors in the second via holes.

Abstract: A current blocking element assembly is provided and includes first and second current blocking elements, first current blocking element including: first-A electrode layer configured to hold ions; first ion conductive layer configured to conduct ions and does not have electronic conductivity; and second-A electrode layer configured to hold ions, first-A electrode layer, first ion conductive layer, and second-A electrode layer laminated in order, second current blocking element including: first-B electrode layer configured to hold ions; second ion conductive layer configured to conduct ions and does not have electronic conductivity; and second-B electrode layer configured to hold ions, first-B electrode layer, second ion conductive layer, and second-B electrode layer laminated in order, wherein the second-A electrode layer and the second-B electrode layer are electrically connected.

Abstract: A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.

Abstract: A method for manufacturing a wiring substrate includes forming conductor pads on a surface of an insulating layer, positioning, on or in the insulating layer, an electronic component having electrode pads, forming a second insulating layer covering the surface of the insulating layer, conductor pads and electronic component, forming first via holes exposing the conductor pads, applying a first desmear treatment to the second insulating layer such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the electrode pads of the electronic component positioned on or in the insulating layer, applying a second desmear treatment to the second insulating layer such that residues are removed from the second via holes, forming first via conductors in the first via holes, and forming second via conductors in the second via holes.

Abstract: A battery pack includes a plurality of bus bars serving to form a plurality of parallel battery structures that each have parallel connection of two or more of a plurality of prismatic batteries. The plurality of bus bars electrically connect the plurality of prismatic batteries to connect the plurality of parallel battery structures in series. The plurality of parallel battery structures connected in series form a battery connection structure that includes a turn causing a reversal of direction of series connection of the plurality of parallel battery structures.

Abstract: A battery pack includes a battery stack having a plurality of prismatic batteries being stacked. The battery pack further includes a cooling plate extending in a stack direction of the prismatic batteries in the battery stack. The cooling plate includes a plurality of coolant passages and a plurality of grooves. The coolant passages extend in a perpendicular direction substantially perpendicular to the stack direction of the prismatic batteries, and allow a coolant to flow in the coolant passages. The grooves constitute heat conduction inhibitors configured to inhibit heat conduction in the stack direction of the prismatic batteries.

Abstract: A cell module includes a plurality of battery cells each having a safety valve at a first end in a height direction, a first current collector plate including a main body having a through hole that at least partly overlaps the safety valve when viewed along the height direction and a lead extending into the through hole from the main body and being electrically connected to a first terminal of each of the battery cells, an exhaust duct disposed over a surface of the first current collector plate remote from the battery cells, and an insulating film being made of an insulating material and covering an area of the first current collector plate facing the exhaust duct. The safety valve opens when an internal pressure of any of the battery cells reaches or exceeds a predetermined level.

Abstract: A solid state battery that includes: a battery element including a positive electrode layer, a negative electrode layer, and a solid electrolyte layer interposed between the positive electrode layer and the negative electrode layer; an end-face electrode facing the end surface of the battery element; a covering layer covering the battery element with the end-face electrode; and an insulating buffer layer between the covering layer and the battery element and surrounding the battery element, wherein the insulating buffer layer is also sandwiched between the battery element and the end-face electrode and arranged intermittently on an end-face electrode facing region side of the end surface of the battery element.

Abstract: An all-solid-state battery that includes a power storage part having a positive electrode layer, a negative electrode layer, and an electrolyte layer interposed between the positive electrode layer and the negative electrode layer; an internal electrode at an end surface of the power storage part; an electrode extraction part electrically connected to the internal electrode; a buffer layer covering the power storage part, the internal electrode, and a first part of the electrode extraction part; a barrier layer covering the buffer layer; and an impact-resistant layer covering the barrier layer such that a second part of the electrode extraction part extends from the impact-resistant layer.