Patents by Inventor Keisuke Toyama

Keisuke Toyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090089786
    Abstract: A technology capable of efficiently performing the processes by using limited resources in an LSI where a plurality of real-time applications are parallelly processed is provided. To provide such a technology, a mechanism is provided in which a plurality of processes to be executed on a plurality of processing units in an LSI are managed throughout the LSI in a unified manner. For each process to be managed, a priority is calculated based on the state of progress of the process, and the execution of the process is controlled according to the priority. A resource management unit IRM or program that collects information such as a process state from each of the processing units executing the processes and calculates a priority for each process is provided. Also, a programmable interconnect unit and storage means for controlling a process execution sequence according to the priority are provided.
    Type: Application
    Filed: October 11, 2006
    Publication date: April 2, 2009
    Inventors: Makoto Saen, Tetsuya Yamada, Satoshi Misaka, Keisuke Toyama, Kenichi Osada
  • Patent number: 7447640
    Abstract: In an acoustic signal encoding apparatus (100), a tonal noise verification unit (110) verifies whether the input acoustic time-domain signals are tonal or noisy. If the input acoustic time-domain signals are tonal, tonal component signals are extracted by a tonal component extraction unit (121), and tonal component parameters are normalized and quantized in a normalization/quantization unit (122). The residual time-domain signals, obtained on extracting the tonal component signals from the acoustic time-domain signals, are transformed by an orthogonal transforming unit (131) into the spectral information, which spectral information is normalized and quantized by a normalization/quantization unit (132). A code string generating unit (140) generates a code string from the quantized tonal component parameters and the quantized residual component spectral information.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: November 4, 2008
    Assignee: Sony Corporation
    Inventors: Minoru Tsuji, Shiro Suzuki, Keisuke Toyama
  • Publication number: 20080199152
    Abstract: A sound processing apparatus includes a sound determination portion operable to determine whether an input sound includes a first sound emitted from a particular source based on location information of the source, a sound separation portion operable to separate the input sound into the first sound and a second sound emitted from a source different from the particular source if the sound determination portion determines that the input sound includes the first sound, and a sound mixing portion operable to mix the first sound and the second sound separated by the sound separation portion at a prescribed volume ratio.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 21, 2008
    Applicant: Sony Corporation
    Inventors: Ryuichi Namba, Mototsugu Abe, Akira Inoue, Keisuke Toyama, Shusuke Takahashi, Masayuki Nishiguchi
  • Publication number: 20080184258
    Abstract: Multiple operating systems are operated on a multi-core system without applying any changes to the operating systems, and unauthorized function invocation and unauthorized data access among the operating systems are detected, thereby assuring high reliability. Access authorization is checked at two levels. At the upper level, a database managed by the multiple operating systems is provided. The database describes which procedure/function, task, or the like can be used to call a function. With reference to this information, it is determined whether invocation of the function has been authorized, by using an invocation authorization management program. At the lower level, access authorization for access to a memory eventually reached when the invocation processing is converted is checked by an access authorization management module using hardware.
    Type: Application
    Filed: December 17, 2007
    Publication date: July 31, 2008
    Inventor: Keisuke Toyama
  • Patent number: 7366661
    Abstract: The present invention relates to an information extraction apparatus capable of analyzing an acoustic signal with accuracy and high efficiency. An amplitude analysis section 32 determines whether or not an attack or release is contained on the basis of an amplitude value for each small region of an input time-series signal. When it is determined that there is an attack or release, an analysis region setting section 33 sets the portion from an attack position to a release position as an analysis region. A frequency analysis section 34 analyzes the input time-series signal by generalized harmonic analysis and outputs extracted waveform information. An extracted waveform synthesis section 35 synthesizes the extracted waveform information and outputs the information to a time-series compensation section 36. The time-series compensation section 36 compensates the signal of the synthesized result with a signal outside the analysis region and outputs an extracted waveform time-series signal to a subtraction unit 37.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: April 29, 2008
    Assignee: Sony Corporation
    Inventors: Minoru Tsuji, Shiro Suzuki, Keisuke Toyama
  • Publication number: 20080086729
    Abstract: A data processor includes: a central processing unit (CPU), in which a plurality of virtual machines (101), each running an application program under controls of different operating systems, and a virtual machine manager (190) for controlling the plurality of virtual machines are selectively arranged according to information set in mode registers (140, 150, 151); and a resource access management module (110) for managing access to hardware resource available for the plurality of virtual machines. The resource access management module accepts, as inputs, the information set in the mode registers and access control information of the central processing unit to the hardware resource, compares the information thus input with information set in a control register, and controls whether or not to permit access to the hardware resource in response to the access control information.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 10, 2008
    Inventors: Yuki Kondoh, Takashi Matsumoto, Keisuke Toyama, Toru Nojiri
  • Publication number: 20080082325
    Abstract: A sound signal encoder for high efficiency encoding of sound signals from a plurality of channels is provided which includes a to-be-correlated object setter (52), to-be-correlated object selector (56) and a variable-length encoder (58). The to-be-correlated object setter (52) sets, on the basis of left-channel frequency information held in a left-channel frequency information holder (50) and right-channel frequency information held in a right-channel frequency information holder (51), index [i] indicating which ones of sine waves on the left channel are to be correlated with, namely, are to be subtracted from, sine waves on the right channel. The to-be-correlated object selector (56) selects a default value read from a storage unit (55) or index [i]-th amplitude information read from a left-channel amplitude information holder (53) as an object to be subtracted from the i-th amplitude information on the right channel according to the index [i].
    Type: Application
    Filed: December 5, 2007
    Publication date: April 3, 2008
    Applicant: SONY CORPORATION
    Inventors: Minoru Tsuji, Shiro Suzuki, Keisuke Toyama
  • Publication number: 20080022140
    Abstract: A chip (1) includes: a resource manager (2); various kinds of functional blocks (3-6); a thermal sensor (13); and a performance counter (15). The resource manager manages tasks that the functional blocks execute, and determines a task progress (38) for each task from an activated ratio (?) provided from the performance counter and a deadline (39) contained in task information (33) and decides priority of each task. When the temperature detected by the thermal sensor during execution of a task is not less than a threshold (T_max), the resource manager reads out a power consumption budget (P_max) from a memory (9) which has been set to make the temperature below the threshold, and stops the clock fed to the functional block executing a task having a lower priority or lowers the frequency of the clock until a chip power consumption value (p_sum) becomes smaller than the power consumption budget.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 24, 2008
    Inventors: Tetsuya Yamada, Makoto Saen, Satoshi Misaka, Keisuke Toyama, Kenichi Osada
  • Patent number: 7212973
    Abstract: In a quantization step information encoding unit, an average value of the quantization step information is found in an approximate shape extraction unit (20), first of all, from one set of a given number of unitary quantization units to another. In an approximate shape encoding unit (21), the approximate shape information is vector-quantized. In a residual signal computing unit (22), the residual signals between the quantization step information and the quantized approximate shape vector are computed. In a residual signal encoding unit (23), the residual signals are variable length encoded, and the so encoded residual signals and the vector quantized approximate shape information are output.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: May 1, 2007
    Assignee: Sony Corporation
    Inventors: Keisuke Toyama, Shiro Suzuki, Minoru Tsuji, Masayuki Nishiguchi
  • Publication number: 20070083779
    Abstract: To perform execution scheduling of function blocks so as to control the total required power of the function blocks within a supplyable power budget value, and thereby realize stable operations at low power consumption. Function block identifiers are allotted to all the function blocks, and to a RAM area that a power consumption control device can read and write, a list to store identifiers and task priority, power mode value showing power states, and power mode time showing the holding time of power states can be linked. A single or plural link lists for controlling the schedules of tasks operating on the function blocks, a link list for controlling the function block in execution currently in high power mode, a link list for controlling the function block in stop currently in stop mode, and a link list for controlling the function block in execution currently in low power mode are allotted, and thereby the power source and the operation clock are controlled by the power consumption control device.
    Type: Application
    Filed: October 4, 2006
    Publication date: April 12, 2007
    Inventors: Satoshi Misaka, Makoto Saen, Tetsuya Yamada, Keisuke Toyama, Kenichi Osada
  • Publication number: 20060259298
    Abstract: There is provided an audio coding device which appropriately sets the quantization bit number by a small calculation amount in each stage when coding an input audio signal by performing multi-stage normalization/quantization. A quantization information calculation section determines total quantization information idw10, based on normalization information idsf, and allocates the total quantization information idw10 for quantization information idw11 and quantization information idw12. At this time, the quantization information calculation section limits the quantization information idw11 by a limiter lim1, and allocates the total quantization information idw10 for quantization information idw11. If the quantization information idw11 exceeds the limiter lim1, the excess is allocated for the quantization information idw12. A first normalization section and a first quantization section normalizes and quantizes a frequency spectrum mdspec1 in the first stage.
    Type: Application
    Filed: May 5, 2006
    Publication date: November 16, 2006
    Inventors: Yuuki Matsumura, Shiro Suzuki, Keisuke Toyama, Mitsuyuki Hatanaka, Yuhki Mitsufuji
  • Patent number: 7124076
    Abstract: The present invention relates to encoding apparatuses which allow encoding to be performed such that the occurrence of pre-echo and post-echo is suppressed. A predetermined waveform analysis is applied to a low-frequency-component input time-sequential signal which includes a high-frequency component occurring at a specific time, and a low-frequency-component time-sequential signal like that shown in FIG. 9A is generated according to a result of the analysis. The low-frequency-component time-sequential signal is removed from the input time-sequential signal to generate a residual time-sequential signal like that shown in FIG. 9B. An amplitude control process is applied such that the amplitude of the residual time-sequential signal is made almost constant in a block which serves as a unit of encoding to generate a time-sequential signal to be quantized, like that shown in FIG. 9C. The time-sequential signal to be quantized is quantized and encoded.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: October 17, 2006
    Assignee: Sony Corporation
    Inventors: Minoru Tsuji, Shiro Suzuki, Keisuke Toyama
  • Patent number: 7124283
    Abstract: The present invention provides a hardware accelerator, which allows faster switching between processing modes. In an information processing device with a bytecode accelerator BCA for translating a stack-based intermediate code (bytecode) into register-based instructions, a selector SEL for switching between BCA and soft VM is posed between an instruction part FET and a decode part DEC and data transfer paths P4 and P5 are formed between BCA and the register file REG_FILE. When bytecode accelerator BCA is activated, the P3 side is selected by the selector SEL and the translated CPU instructions are transferred to the decode part DEC. If the intermediate language code cannot be translated by the BCA, the processing mode is switched to software processing. During switching between the modes, internal information of BCA can be transferred between BCA and REG_FILE in parallel, achieving faster mode switching.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: October 17, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Tetsuya Yamada, Naohiko Irie, Takanobu Tsunoda, Takahiro Irita, Keisuke Toyama, Masayuki Kabasawa
  • Publication number: 20060153402
    Abstract: In an audio-information encoding apparatus, in order to encode an audio signal containing a white-noise component, an index iL indicating the energy level of the white-noise component and an index iR designating the start index of a random-number table are introduced into a code train. In an audio-information decoding apparatus (20), a white-noise generating unit (25) uses the indices iL and iR contained in the code train, thereby generating a white-noise signal Sw(t) on the time axis, which has the same level as the white noise, and an adder (26) adds the white-noise signal to an audio signal Sf(t) decoded on the time axis, outputting as an output audio signal So(t).
    Type: Application
    Filed: October 10, 2003
    Publication date: July 13, 2006
    Applicant: Sony Corporation
    Inventors: Shiro Suzuki, Minoru Tsuji, Keisuke Toyama
  • Publication number: 20060115092
    Abstract: The present invention relates to an encoding device for saving the number of bits of codes. In step S11, the differential value between a normalization coefficient Bi to be encoded and a normalization coefficient Bi-1 for an encoding unit Ai-1 in a band adjacent to the lower side of an encoding unit Ai corresponding to the normalization coefficient Bi is computed. In step S12, reference is made to a table in which a differential value having a high frequency of occurrence is associated with a code having a small number of bits, and a code corresponding to the computed differential value is read. In step S13, it is determined whether or not all normalization coefficients B have been encoded. If it is determined that all normalization coefficients B have been encoded, in step S14, the code read in step S12 is output. The present invention is applicable to an audio recorder.
    Type: Application
    Filed: January 3, 2006
    Publication date: June 1, 2006
    Inventors: Keisuke Toyama, Shiro Suzuki, Minoru Tsuji
  • Patent number: 7016502
    Abstract: The present invention relates to an encoding device for saving the number of bits of codes. In step S11, the differential value between a normalization coefficient Bi to be encoded and a normalization coefficient Bi-1 for an encoding unit Ai-1 in a band adjacent to the lower side of an encoding unit Ai corresponding to the normalization coefficient Bi is computed. In step S12, reference is made to a table in which a differential value having a high frequency of occurrence is associated with a code having a small number of bits, and a code corresponding to the computed differential value is read. In step S13, it is determined whether or not all normalization coefficients B have been encoded. If it is determined that all normalization coefficients B have been encoded, in step S14, the code read in step S12 is output. The present invention is applicable to an audio recorder.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: March 21, 2006
    Assignee: Sony Corporation
    Inventors: Keisuke Toyama, Shiro Suzuki, Minoru Tsuji
  • Patent number: 7000072
    Abstract: To assure the multiprocessing performance of CPU on a microprocessor, the invention provides a method of memory mapping for multiple concurrent processes, thus minimizing cache thrashing. An OS maintains a management (mapping) table for controlling the cache occupancy status. When a process is activated, the OS receives from the process the positional information for a specific part (principal part) to be executed most frequently in the process and coordinates addressing of a storage area where the process is loaded by referring to the management table, ensuring that the cache address assigned for the principal part of the process differs from that for any other existing process. Taking cache memory capacity, configuration scheme, and process execution priority into account when executing the above coordination, a computer system is designed such that a highest priority process can have a first priority in using the cache.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: February 14, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Aisaka, Keisuke Toyama
  • Patent number: 6995699
    Abstract: In an encoding apparatus, when difference value between adjacent quantization units of quantization accuracy information where, e.g., distribution range is 0˜7, e.g., if difference value is 3 or more, 8 is subtracted, and if difference value is less than ?4, 8 is added to thereby transform two difference values where difference therebetween is 8 into the same value. Thus, the distribution range of difference value becomes ?4˜3, and size of code book (table) can be held down to the same size in the case where difference is not taken. In addition, high order 1 bit of difference value may be masked to carry out replacement into value consisting of only low order 3 bits, thus also making it possible to prevent increase in size of code book (table).
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: February 7, 2006
    Assignee: Sony Corporation
    Inventors: Keisuke Toyama, Minoru Tsuji, Shiro Suzuki
  • Publication number: 20050267744
    Abstract: Any disagreement of the power level before encoding an audio signal and the power level after encoding the audio signal is adjusted to improve the sound quality to the auditory sense.
    Type: Application
    Filed: May 19, 2005
    Publication date: December 1, 2005
    Inventors: Benjamin Nettre, Keisuke Toyama, Shiro Suzuki
  • Publication number: 20050261893
    Abstract: In a quantization step information encoding unit, an average value of the quantization step information is found in an approximate shape extraction unit (20), first of all, from one set of a given number of unitary quantization units to another. In an approximate shape encoding unit (21), the approximate shape information is vector-quantized. In a residual signal computing unit (22), the residual signals between the quantization step information and the quantized approximate shape vector are computed. In a residual signal encoding unit (23), the residual signals are variable length encoded, and the so encoded residual signals and the vector quantized approximate shape information are output.
    Type: Application
    Filed: June 11, 2002
    Publication date: November 24, 2005
    Inventors: Keisuke Toyama, Shiro Suzuki, Minoru Tsuji, Masayuki Nishiguchi