Abstract: An inductor component includes an element body. The element body includes an inductor wire extending parallel to a first principal surface of the element body, a plurality of columnar wires extending in a direction intersecting the first principal surface, and a plurality of outer electrodes exposed from the first principal surface. When viewed transparently in a direction orthogonal to the first principal surface, a first vector extending from a geometric center of at least one selected from a plurality of first-end columnar wires toward a geometric center of a first outer electrode connected to the first columnar wire is different from a second vector extending from a geometric center of at least one selected from a plurality of second-end columnar wires toward a geometric center of a second outer electrode connected to the second columnar wire.

Abstract: An electronic component includes a capacitor element, an inductor element connected electrically to the capacitor element, and an interlayer-insulation layer between the capacitor and inductor elements. The interlayer-insulation layer has a first principal surface, a second principal surface, and a via hole through the interlayer-insulation layer between the first and second principal surfaces. The capacitor element is at a side of the second principal surface of the interlayer-insulation layer and includes a first electrode layer, a second electrode layer, and a dielectric layer interposed between the first electrode layer and the second electrode layer. The inductor element is at a side of the first principal surface of the interlayer-insulation layer and includes an inductor wire that has an inductor portion disposed on the first principal surface and also has a via portion through the via hole to connect the inductor portion to the second electrode layer.

Abstract: A data transfer control device includes a control component (DMA controller 5) which acquires a data transfer instruction including, as its parameters, start memory addresses or start input/output addresses and data transfer size of the peripheral devices to be used as the transfer source and transfer destination when carrying out data transfer from a first peripheral device (peripheral (A)) to a second peripheral device (peripheral (B)); which reads out target data from the first peripheral device in accordance with the parameters; and which processes the target data and then transfers to the second peripheral device.

Abstract: A data transfer control device includes a control component (DMA controller 5) which acquires a data transfer instruction including, as its parameters, start memory addresses or start input/output addresses and data transfer size of the peripheral devices to be used as the transfer source and transfer destination when carrying out data transfer from a first peripheral device (peripheral (A)) to a second peripheral device (peripheral (B)); which reads out target data from the first peripheral device in accordance with the parameters; and which processes the target data and then transfers to the second peripheral device.