Patents by Inventor Keita Izumi
Keita Izumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240148335Abstract: An estimation apparatus acquires stance phases of both feet and estimates a risk of abnormality of a lower limb on the basis of the difference between the stance phases of the both feet.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: NEC CorporationInventors: Chenhui HUANG, Kenichiro Fukushi, Yusuke Sekiguchi, Haruki Yaguchi, Keita Honda, Shinichi Izumi, Dai Owaki
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Publication number: 20240148336Abstract: A risk estimation apparatus includes a data acquisition unit that acquires measured data of foot pressures of the left foot and the right foot obtained by sensors that are provided in shoes and measure the foot pressures, a stance phase identification unit that identifies a starting timing and an ending timing of a stance phase of each of the left foot and the right foot from the measured data of the foot pressures, and a risk estimation unit that estimates a risk of abnormality of a lower limb on the basis of asymmetry between the foot pressures of the left foot and the right foot during the stance phase.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: NEC CorporationInventors: Chenhui HUANG, Kenichiro Fukushi, Yusuke Sekiguchi, Haruki Yaguchi, Keita Honda, Shinichi Izumi, Dai Owaki
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Publication number: 20240148333Abstract: An estimation apparatus acquires stance phases of both feet and estimates a risk of abnormality of a lower limb on the basis of the difference between the stance phases of the both feet.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: NEC CorporationInventors: Chenhui Huang, Kenichiro Fukushi, Yusuke Sekiguchi, Haruki Yaguchi, Keita Honda, Shinichi Izumi, Dai Owaki
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Publication number: 20240148334Abstract: An estimation apparatus acquires stance phases of both feet and estimates a risk of abnormality of a lower limb on the basis of the difference between the stance phases of the both feet.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: NEC CorporationInventors: Chenhui HUANG, Kenichiro Fukushi, Yusuke Sekiguchi, Haruki Yaguchi, Keita Honda, Shinichi Izumi, Dai Owaki
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Publication number: 20240148337Abstract: A risk estimation apparatus includes a data acquisition unit that acquires measured data of foot pressures of the left foot and the right foot obtained by sensors that are provided in shoes and measure the foot pressures, a stance phase identification unit that identifies a starting timing and an ending timing of a stance phase of each of the left foot and the right foot from the measured data of the foot pressures, and a risk estimation unit that estimates a risk of abnormality of a lower limb on the basis of asymmetry between the foot pressures of the left foot and the right foot during the stance phase.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: NEC CorporationInventors: Chenhui HUANG, Kenichiro Fukushi, Yusuke Sekiguchi, Haruki Yaguchi, Keita Honda, Shinichi Izumi, Dai Owaki
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Publication number: 20240148338Abstract: A risk estimation apparatus includes a data acquisition unit that acquires measured data of foot pressures of the left foot and the right foot obtained by sensors that are provided in shoes and measure the foot pressures, a stance phase identification unit that identifies a starting timing and an ending timing of a stance phase of each of the left foot and the right foot from the measured data of the foot pressures, and a risk estimation unit that estimates a risk of abnormality of a lower limb on the basis of asymmetry between the foot pressures of the left foot and the right foot during the stance phase.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicant: NEC CorporationInventors: Chenhui HUANG, Kenichiro Fukushi, Yusuke Sekiguchi, Haruki Yaguchi, Keita Honda, Shinichi Izumi, Dai Owaki
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Patent number: 11925483Abstract: A risk estimation apparatus includes a data acquisition unit that acquires measured data of foot pressures of the left foot and the right foot obtained by sensors that are provided in shoes and measure the foot pressures, a stance phase identification unit that identifies a starting timing and an ending timing of a stance phase of each of the left foot and the right foot from the measured data of the foot pressures, and a risk estimation unit that estimates a risk of abnormality of a lower limb on the basis of asymmetry between the foot pressures of the left foot and the right foot during the stance phase.Type: GrantFiled: June 29, 2021Date of Patent: March 12, 2024Assignee: NEC CORPORATIONInventors: Chenhui Huang, Kenichiro Fukushi, Yusuke Sekiguchi, Haruki Yaguchi, Keita Honda, Shinichi Izumi, Dai Owaki
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Patent number: 11918534Abstract: The present invention facilitates adjustment of the strength of an elastic orthotic that assists the movement of an orthotics user by whom the elastic orthotic is worn. This calculation device for calculating the optimum elastic strength of an elastic includes a storage unit in which elastic strength or kinematic properties established through experiments in which a plurality of people wear elastic orthotics are stored in advance, and a mathematical optimization processing unit that calculates the optimal elastic strength on the basis of a prescribed evaluation index on the basis of the kinematic limitations of an orthotics user and the elastic strength or kinetic properties.Type: GrantFiled: July 18, 2018Date of Patent: March 5, 2024Assignee: NEC CORPORATIONInventors: Kenichiro Fukushi, Yusuke Sekiguchi, Dai Owaki, Keita Honda, Shinichi Izumi
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Patent number: 11150685Abstract: It is desirable to reduce power consumption without reducing a function in an electronic apparatus operating in a plurality of modes different in power consumption from one another. A processor operates in a normal mode, in which power consumption is higher, of two modes different in power consumption from each other, and stops operation in a power saving mode, in which the power consumption is lower, of the two modes. A control section outputs a power saving mode control command instructing an increase or decrease of a supply electric power to a digital circuit different from the processor in the power saving mode. A power source managing integrated circuit increases or decreases the supply electric power to the digital circuit in accordance with the power saving mode control command, and outputs the increased or decreased supply electric power.Type: GrantFiled: November 7, 2017Date of Patent: October 19, 2021Assignee: Sony Semiconductor Solutions CorporationInventors: Keita Izumi, Toshimasa Shimizu, Katsumi Takaoka
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Patent number: 10591953Abstract: The present disclosure relates to a signal processing apparatus and method that enables to reduce required power. In the signal processing apparatus, a RTC of a main chip and a RTC of a power supply chip are synchronized before power supply of the main chip is stopped, and the RTC of the main chip is synchronized with the time of the RTC of the power supply chip after the power supply of the main chip is restored. In this way, the RTC uses continuous time information before and after the stop. The present disclosure is capable of being applied to, for example, a GPS module in which a digital circuit includes a plurality of chips.Type: GrantFiled: May 20, 2016Date of Patent: March 17, 2020Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Sotaro Ohara, Katsuyuki Tanaka, Katsumi Takaoka, Keita Izumi, Suguru Houchi, Gaku Hidai, Yutaka Takagi, Hideki Takahashi, Hideki Awata, Yasushi Katayama, Naoki Yoshimochi, Toshimasa Shimizu
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Publication number: 20190235565Abstract: It is desirable to reduce power consumption without reducing a function in an electronic apparatus operating in a plurality of modes different in power consumption from one another. A processor operates in a normal mode, in which power consumption is higher, of two modes different in power consumption from each other, and stops operation in a power saving mode, in which the power consumption is lower, of the two modes. A control section outputs a power saving mode control command instructing an increase or decrease of a supply electric power to a digital circuit different from the processor in the power saving mode. A power source managing integrated circuit increases or decreases the supply electric power to the digital circuit in accordance with the power saving mode control command, and outputs the increased or decreased supply electric power.Type: ApplicationFiled: November 7, 2017Publication date: August 1, 2019Inventors: Keita Izumi, Toshimasa Shimizu, Katsumi Takaoka
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Publication number: 20180210487Abstract: The present disclosure relates to a signal processing apparatus and method that enables to reduce required power. In the signal processing apparatus, a RTC of a main chip and a RTC of a power supply chip are synchronized before power supply of the main chip is stopped, and the RTC of the main chip is synchronized with the time of the RTC of the power supply chip after the power supply of the main chip is restored. In this way, the RTC uses continuous time information before and after the stop. The present disclosure is capable of being applied to, for example, a GPS module in which a digital circuit includes a plurality of chips.Type: ApplicationFiled: May 20, 2016Publication date: July 26, 2018Inventors: SOTARO OHARA, KATSUYUKI TANAKA, KATSUMI TAKAOKA, KEITA IZUMI, SUGURU HOUCHI, GAKU HIDAI, YUTAKA TAKAGI, HIDEKI TAKAHASHI, HIDEKI AWATA, YASUSHI KATAYAMA, NAOKI YOSHIMOCHI, TOSHIMASA SHIMIZU
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Publication number: 20150121159Abstract: There is provided a semiconductor integrated circuit, including a test circuit, a plurality of signal cells, a power supply cell, and a control circuit. The test circuit performs a predetermined test on a test target circuit. A plurality of signal cells input an input signal into the test circuit and the test target circuit. The power supply cell supplies power to some of the plurality of signal cells in the test. The control circuit controls a value of the input signal from signal cells that include signal cells to which the power is not supplied and that are not used in the test, to be a predetermined value.Type: ApplicationFiled: October 7, 2014Publication date: April 30, 2015Inventors: Keita Izumi, Katsumi Takaoka, Toshiyuki Kouchiyama, Syunsuke Hamashima, Kouichirou Ono
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Patent number: 8750424Abstract: A signal receiving apparatus has: a radius identifying section configured to identify a radius representing a distance from an origin on an IQ plane of signal points each corresponding to a symbol obtained from a received signal modulated by adoption of an APSK modulation method; and a parameter outputting section configured to output a control parameter related to a demodulation or decoding process of the received signal on the basis of the identified radius.Type: GrantFiled: August 9, 2011Date of Patent: June 10, 2014Assignee: Sony CorporationInventors: Tetsuhiro Futami, Keita Izumi
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Patent number: 8424502Abstract: The present invention provides an intake manifold that improves the intake performance and has a reduced weight. The intake manifold includes a surge tank and intake pipes. Each intake pipe has an inlet port that is connected to the surge tank. The inlet ports are arranged along a flow direction of air drawn into the surge tank from the opening of the surge tank, and project into the surge tank along direction that intersects the flow direction. Each adjacent pair of the inlet ports are separated only by a single common pipe wall.Type: GrantFiled: March 30, 2010Date of Patent: April 23, 2013Assignees: Toyota Boshoku Kabushiki Kaisha, Fuji Jukogyo Kabushiki KaishaInventors: Minoru Takakuwa, Hideki Inaba, Keita Izumi
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Patent number: 8406366Abstract: Disclosed herein is a synchronization circuit including: a first phase-locked loop circuit; a second phase-locked loop circuit; a first output circuit; a second output circuit; a first detection circuit; a second detection circuit; and a control circuit.Type: GrantFiled: April 28, 2010Date of Patent: March 26, 2013Assignee: Sony CorporationInventors: Masayuki Hattori, Tetsuhiro Futami, Yuichi Hirayama, Keita Izumi
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Publication number: 20120063549Abstract: A signal receiving apparatus has: a radius identifying section configured to identify a radius representing a distance from an origin on an IQ plane of signal points each corresponding to a symbol obtained from a received signal modulated by adoption of an APSK modulation method; and a parameter outputting section configured to output a control parameter related to a demodulation or decoding process of the received signal on the basis of the identified radius.Type: ApplicationFiled: August 9, 2011Publication date: March 15, 2012Applicant: SONY CORPORATIONInventors: Tetsuhiro FUTAMI, Keita Izumi
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Publication number: 20100303186Abstract: Disclosed herein is a synchronization circuit including: a first phase-locked loop circuit; a second phase-locked loop circuit; a first output circuit; a second output circuit; a first detection circuit; a second detection circuit; and a control circuit.Type: ApplicationFiled: April 28, 2010Publication date: December 2, 2010Applicant: Sony CorporationInventors: Masayuki Hattori, Tetsuhiro Futami, Yuichi Hirayama, Keita Izumi
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Publication number: 20100242892Abstract: The present invention provides an intake manifold that improves the intake performance and has a reduced weight. The intake manifold includes a surge tank and intake pipes. Each intake pipe has an inlet port that is connected to the surge tank. The inlet ports are arranged along a flow direction of air drawn into the surge tank from the opening of the surge tank, and project into the surge tank along direction that intersects the flow direction. Each adjacent pair of the inlet ports are separated only by a single common pipe wall.Type: ApplicationFiled: March 30, 2010Publication date: September 30, 2010Applicants: TOYOTA BOSHOKU KABUSHIKI KAISHA, FUJI JUKOGYO KABUSHIKI KAISHAInventors: Minoru TAKAKUWA, Hideki INABA, Keita IZUMI