Abstract: Main cells that constitute a semiconductor element having a trench gate structure include first cells, and second cells having a structure in which gate insulating films are more easily broken by energization than those in the first cells, and the number of which is smaller than that of the first cells. At a time of driving the semiconductor element, a common gate drive voltage is applied to gate electrodes of the first cells and the second cells. An electrical characteristic is measured to detect failure of the second cells due to energization at the time of driving. The gate electrodes of the failed second cells are electrically isolated from the gate electrodes of the first cells so that the gate drive voltage is not applied to the failed second cells. The failure of the first cells is predicted based on the failure of the second cells.

Abstract: A semiconductor device includes a first main electrode, a second main electrode, and a semiconductor layer. The semiconductor layer includes a p-type semiconductor region disposed at a position exposed from the upper surface of the semiconductor layer and electrically connected to the second main electrode, and an n-type semiconductor region in contact with the p-type semiconductor region and separated from the second main electrode by the p-type semiconductor region. The n-type semiconductor region has a trap region provided at a position in contact with the p-type semiconductor region, and a hole trap is formed in the trap region.

Abstract: A semiconductor device includes: a substrate; and an n-type layer including a nitride semiconductor formed on the surface of the substrate. In the n-type layer, the concentration of donor impurities (excluding O) is 1×1015 cm?3 or more and 1×1020 cm?3 or less, the concentration of C impurities is 1×1016 cm?3 or less, the concentration of O impurities is 1×1016 cm?3 or less, the concentration of Ca impurities is 1×1016 cm?3 or less, and the sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities. Such a semiconductor device can be fabricated by using a halogen-free vapor phase epitaxy (HF-VPE) device.

Abstract: In a surface treatment method for a gallium oxide-based semiconductor substrate, a surface of the gallium oxide-based semiconductor substrate is flattened by dry etching with a self-bias of 150 V or more. After the surface of the gallium oxide-based semiconductor substrate is flattened, the surface of the gallium oxide-based semiconductor substrate is washed with a chemical solution containing H2SO4 to expose a step terrace structure on the surface of the gallium oxide-based semiconductor substrate.

Abstract: A semiconductor device includes a semiconductor substrate, a top electrode in contact with a top surface of the semiconductor substrate, a bottom electrode in contact with a bottom surface of the semiconductor substrate, and an oxide film in contact with the top surface of the semiconductor substrate. The semiconductor substrate includes an element region and an outer peripheral region. The element region is a region where the top electrode is in contact with the top surface of the semiconductor substrate. The outer peripheral region is a region where the oxide film is in contact with the top surface of the semiconductor substrate, and is located between the element region and an outer peripheral end surface of the semiconductor substrate. The element region includes a semiconductor element connected between the top electrode and the bottom electrode. The outer peripheral region includes surface high-voltage-breakdown regions, deep high-voltage-breakdown regions, and a drift region.

Abstract: A switching element includes a semiconductor substrate, a gate insulating film, and a gate electrode that is disposed inside the trench. The semiconductor substrate further includes: an n-type source region, a p-type body region, an n-type drift region, a p-type first electric field reduced region, and a p-type connection region. When a permittivity of the connection region is ? (F/cm), a critical electric field strength of the connection region is Ec (V/cm), an elementary charge is e (C), an area density of p-type impurity when viewed in a plan view of the connection region located below the trench is Q (cm?2), Q>?*Ec/e.

Abstract: A switching element includes a semiconductor substrate having: an n-type drift region in contact with each of gate insulating films on a bottom surface and side surfaces of each of the trenches; a p-type body region in contact with the gate insulating films on the side surfaces of each of the trenches at a position above the n-type drift region; an n-type source region in contact with the gate insulating films on the side surfaces of each of the trenches at a position above the p-type body region, the n-type source region being separated away from the n-type drift region by the p-type body region; plurality of p-type bottom regions each of which is located under a corresponding one of the trenches and located away from a corresponding one of the gate insulating films; and a p-type connection region that connects the p-type bottom regions and the p-type body region.

Abstract: A light-emitting element includes an n-type contact layer which includes AlGaN and in which a Fermi level and a conduction band are in degeneracy, and a light-emitting layer including AlGaN and being stacked on the n-type contact layer. An Al composition x of the n-type contact layer is not less than 0.1 greater than an Al composition x of the light-emitting layer. The n-type contact layer has an effective donor concentration that is a concentration to cause the degeneracy and that is not more than 4.0×1019 cm?3.

Abstract: A sensor attachment structure includes an energy absorption member, a sensor attachment portion provided to the energy absorption member and configured to attach a sensor case that houses a pressure sensor, and a cover that defines a space to house the sensor case between the cover and the sensor attachment portion. The sensor case is attached to the sensor attachment portion by locking. At least one of the sensor case, the sensor attachment portion, and the cover includes a fall preventing structure that prevents the sensor case from falling off an opening formed by the sensor attachment portion and the cover.

Abstract: A method of manufacturing a group III nitride semiconductor substrate may comprise introducing group III element vacancies to a first region of the group III nitride semiconductor substrate. The method may comprise introducing an acceptor element to a second region of the group III nitride semiconductor substrate. The second region may contact the first region at least in part. The method may comprise performing annealing to activate the acceptor element in the second region.

Abstract: A semiconductor device includes: a substrate; and an n-type layer including a nitride semiconductor formed on the surface of the substrate. In the n-type layer, the concentration of donor impurities (excluding O) is 1×1015 cm?3 or more and 1×1020 cm?3 or less, the concentration of C impurities is 1×1016 cm?3 or less, the concentration of O impurities is 1×1016 cm?3 or less, the concentration of Ca impurities is 1×1016 cm?3 or less, and the sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities. Such a semiconductor device can be fabricated by using a halogen-free vapor phase epitaxy (HF-VPE) device.

Abstract: A sensor attachment structure includes an energy absorption member, a sensor attachment portion provided to the energy absorption member and configured to attach a sensor case that houses a pressure sensor, and a cover that defines a space to house the sensor case between the cover and the sensor attachment portion. The sensor case is attached to the sensor attachment portion by locking. At least one of the sensor case, the sensor attachment portion, and the cover includes a fall preventing structure that prevents the sensor case from falling off an opening formed by the sensor attachment portion and the cover.

Abstract: A method of manufacturing a group III nitride semiconductor substrate may comprise introducing group III element vacancies to a first region of the group III nitride semiconductor substrate. The method may comprise introducing an acceptor element to a second region of the group III nitride semiconductor substrate. The second region may contact the first region at least in part. The method may comprise performing annealing to activate the acceptor element in the second region.

Abstract: A range image obtaining system for a track includes a laser slit light source disposed within a plane perpendicular to a tread of a rail and emits laser slit light within the plane; a two-dimensional image imaging device which is disposed to have an angle with respect to the plane perpendicular to the tread of the rail and obtains a light sectioning image generated from the laser slit light; and an image signal processing device for generating a range image based on a distance from the two-dimensional image imaging device based on the light sectioning image.

Abstract: A range image obtaining system for a track includes a laser slit light source disposed within a plane perpendicular to a tread of a rail and emits laser slit light within the plane; a two-dimensional image imaging device which is disposed to have an angle with respect to the plane perpendicular to the tread of the rail and obtains a light sectioning image generated from the laser slit light; and an image signal processing device for generating a range image based on a distance from the two-dimensional image imaging device based on the light sectioning image.