Patents by Inventor Keita Mizoguchi

Keita Mizoguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9224713
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: December 29, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Tsukiyama, Masatoshi Fukuda, Hiroshi Watabe, Keita Mizoguchi, Naoyuki Komuta
  • Publication number: 20140206144
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.
    Type: Application
    Filed: March 21, 2014
    Publication date: July 24, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi TSUKIYAMA, Masatoshi FUKUDA, Hiroshi WATABE, Keita MIZOGUCHI, Naoyuki KOMUTA
  • Patent number: 8710654
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: April 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Tsukiyama, Masatoshi Fukuda, Hiroshi Watabe, Keita Mizoguchi, Naoyuki Komuta
  • Publication number: 20130134583
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.
    Type: Application
    Filed: May 22, 2012
    Publication date: May 30, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi TSUKIYAMA, Masatoshi Fukuda, Hiroshi Watabe, Keita Mizoguchi, Naoyuki Komuta
  • Publication number: 20100087033
    Abstract: A resin layer is formed on a support substrate. An intermediate structure body is formed on the resin layer. The support substrate is fixed to a first unit configured to fix and heat. The intermediate structure body is fixed to a second unit configured to fix and heat. The support substrate and the intermediate structure body are heated by the first unit or the second unit, so as to soften the resin layer. The second unit is moved with respect to the first unit along each of a plurality of line segments or a curve, so as to enlarge a distance between a center of the support substrate and a center of the intermediate structure body as the second unit moves, while the support substrate and the intermediate structure body being kept in the horizontal state, and until the support substrate and the intermediate structure body are separated.
    Type: Application
    Filed: September 30, 2009
    Publication date: April 8, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keita Mizoguchi, Soichi Homma