Patents by Inventor Keith A. Jenkins
Keith A. Jenkins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11131706Abstract: A computer system may determine a first set of output values for a set of test paths at a first time. Each output value may correspond to a test path in the set of test paths. The computer system may then determine a second set of output values at a second time. Each output value in the second set of output values may have an associated output value in the first set of output values. The computer system may then determine whether degradation of the semiconductor chip has occurred by comparing the first set of output values to the second set of output values.Type: GrantFiled: December 8, 2015Date of Patent: September 28, 2021Assignee: International Business Machines CorporationInventor: Keith A. Jenkins
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Patent number: 11105856Abstract: Methods and systems of detecting chip degradation are described. A processor may execute a test on a device at a first time, where the test includes executable instructions for the device to execute a task under specific conditions relating to a performance attribute. The processor may receive performance data indicating a set of outcomes from the task executed by the device during the test. The processor may determine a first value of a parameter of the performance attribute based on the identified subset. The processor may compare the first value with a second value of the parameter of the performance attribute. The second value is based on an execution of the test on the device at a second time. The processor may determine a degradation status of the device based on the comparison of the first value with the second value.Type: GrantFiled: November 13, 2018Date of Patent: August 31, 2021Assignee: International Business Machines CorporationInventors: Emily A. Ray, Emmanuel Yashchin, Peilin Song, Kevin G. Stawiasz, Barry Linder, Alan Weger, Keith A. Jenkins, Raphael P. Robertazzi, Franco Stellari, James Stathis
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Patent number: 10901025Abstract: Methods and systems for measuring degradation includes measuring an initial electrical characteristic of a test device in a ring oscillator that includes multiple oscillator stages and a test stage having a delay stage and the test device. The ring oscillator is operated for a period of time. The electrical characteristic of the test device is measured after operating the ring oscillator. A level of degradation in the test device is determined using a processor based on the measurements of the electrical characteristic of the test device.Type: GrantFiled: August 23, 2018Date of Patent: January 26, 2021Assignee: International Business Machines CorporationInventors: Barry P. Linder, Keith A. Jenkins
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Patent number: 10782336Abstract: Embodiments are directed to a system for measuring a degradation characteristic of a plurality of electronic components. The system includes a parallel stress generator communicatively coupled to the plurality of electronic components, and a serial electronic measuring component communicatively coupled to the plurality of electronic components. The parallel stress generator is configured to generate a plurality of stress signals, apply the plurality of stress signals in parallel to the plurality of electronic components and remove the plurality of stress signals from the plurality of electronic components. The serial electronic measuring component is configured to, subsequent to the removal of the plurality of stress signals, sequentially measure the degradation characteristic of each one of the plurality of electronic components in order to determine their degradation resulting from the applied stress signals.Type: GrantFiled: March 25, 2016Date of Patent: September 22, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Keith A. Jenkins, Barry P. Linder
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Patent number: 10746785Abstract: A method and circuit of monitoring an effective age of a target circuit are provided. A standby mode is activated in the target circuit. A standby current of a first number of circuit blocks of the target circuit is measured. The measured standby current of the first number of circuit blocks is compared to a first baseline standby current of the first number of circuit blocks. Upon determining that the measured standby current of the first number of circuit blocks is below a first predetermined factor of a baseline standby current of the first number of circuit blocks, the first number of circuit blocks is identified to have a bias temperature instability (BTI) degradation concern.Type: GrantFiled: August 5, 2016Date of Patent: August 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chen-Yong Cher, Keith A. Jenkins, Barry P. Linder
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Patent number: 10739391Abstract: Methods and systems for measuring a duty cycle of a signal include applying a first branch of an input signal directly to a latch. A delay of a second branch of the input signal is incrementally increased, with the second branch being applied to the latch, until the latch changes its output. A delay, corresponding to the latch's changed output, is divided by a period of the input signal to determine a duty cycle of the input signal.Type: GrantFiled: August 23, 2017Date of Patent: August 11, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Keith A. Jenkins
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Patent number: 10671958Abstract: A computer-implemented method for analyzing customer satisfaction is presented. The computer-implemented method may include capturing visual images related to individuals and order consumables, determining, by a processor, at least one measurable metric to predict variations indicating different satisfaction levels, and dynamically refining parameters if the variations exceed one or more thresholds. The computer-implemented method further includes receiving the captured visual images of the individuals and the order consumables by least one camera in communication with the processor.Type: GrantFiled: May 8, 2019Date of Patent: June 2, 2020Assignee: International Business Machines CorporationInventors: Karthik Balakrishnan, Keith A. Jenkins, Barry P. Linder
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Publication number: 20200150181Abstract: Methods and systems of detecting chip degradation are described. A processor may execute a test on a device at a first time, where the test includes executable instructions for the device to execute a task under specific conditions relating to a performance attribute. The processor may receive performance data indicating a set of outcomes from the task executed by the device during the test. The processor may determine a first value of a parameter of the performance attribute based on the identified subset. The processor may compare the first value with a second value of the parameter of the performance attribute. The second value is based on an execution of the test on the device at a second time. The processor may determine a degradation status of the device based on the comparison of the first value with the second value.Type: ApplicationFiled: November 13, 2018Publication date: May 14, 2020Inventors: Emily A. Ray, Emmanuel Yashchin, Peilin Song, Kevin G. Stawiasz, Barry Linder, Alan Weger, Keith A. Jenkins, Raphael P. Robertazzi, Franco Stellari, James Stathis
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Patent number: 10574240Abstract: An electronic apparatus for testing an integrated circuit (IC) that includes a ring oscillator is provided. The apparatus configures the ring oscillator to produce oscillation at a first frequency and configures the ring oscillator to produce oscillation at a second frequency. The apparatus then compares the second frequency with an integer multiple of the first frequency to determine a resistive voltage drop between a voltage applied to the IC and a local voltage at the ring oscillator. The ring oscillator has a chain of inverting elements forming a long ring and a short ring. The ring oscillator also has an oscillation selection circuit that is configured to disable the short ring so that the ring oscillator produces a fundamental oscillation based on signal propagation through the long ring and enable the short ring so that the ring oscillator produces a harmonic oscillation based on a signal propagation through the short ring and the long ring.Type: GrantFiled: February 28, 2017Date of Patent: February 25, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Keith A. Jenkins, Peilin Song, James H. Stathis, Franco Stellari
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Patent number: 10564213Abstract: A method and system of monitoring a reliability of a semiconductor circuit are provided. A current consumption of a first ring oscillator that is in static state is measured at predetermined intervals. Each measured current consumption value is stored. A baseline current consumption value of the first ring oscillator is determined based on the stored current consumption values. A latest measured current consumption value of the first ring oscillator is compared to the baseline current consumption value. Upon determining that the latest measured current consumption value is above a threshold deviation from the baseline current consumption value, the first ring oscillator is identified to have a dielectric breakdown degradation.Type: GrantFiled: February 27, 2017Date of Patent: February 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tam N. Huynh, Keith A. Jenkins, Franco Stellari
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Patent number: 10552278Abstract: A method and system are provided for chip testing. The method includes selectively deploying a chip for future use or discarding the chip to prevent the future use, responsive to a stress history of the chip determined using a non-destructive test procedure. The test procedure includes ordering each of a plurality of functional patterns by a respective minimum operating period corresponding thereto. The test procedure further includes ranking each of the plurality of patterns based on at least one preceding available pattern to provide a plurality of pattern ranks. The test procedure also includes calculating a sum by summing the plurality of pattern ranks. The sum calculated during an initial performance of the test procedure is designated as a baseline, and the sum calculated during a subsequent performance of the test procedure is compared to a threshold derived from the baseline to determine the stress history of the chip.Type: GrantFiled: July 13, 2018Date of Patent: February 4, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Keith A. Jenkins, Barry P. Linder, Emily A. Ray, Raphael P. Robertazzi, Peilin Song, James H. Stathis, Kevin G. Stawiasz, Franco Stellari, Alan J. Weger, Emmanuel Yashchin
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Patent number: 10491610Abstract: A software signature transceiver includes a signature receiver configured to couple to a programmable electronic device and sense a signature signal generated by the programmable electronic device, wherein the signature signal varies according to computer program codes executed by the programmable electronic device, and a signature transmitter operably connected to the signature receiver, the signature transmitter configured to transmit a signature transmission signal corresponding to the signature signal. A corresponding method to use the software signature transceiver and a software monitoring device to determine whether unknown software is executing on a programmable electronic device is also disclosed herein. A corresponding system comprising the programmable electronic device, the software signature transceiver, and a software monitoring device is also disclosed herein.Type: GrantFiled: May 20, 2016Date of Patent: November 26, 2019Assignee: International Business Machines CorporationInventors: Keith A. Jenkins, Raphael P. Robertazzi, Alberto Valdes Garcia
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Patent number: 10433173Abstract: A method for gaining access beyond a restricted access gateway includes an access key sequence stored on memory of a device. The access key sequence includes a sequence of key entries and key touch movements. An entered request sequence including keys activated by touch on a keyboard of the device and directions of touch movements made on the keyboard is recorded. With an access controller, it is determined whether the recorded entered request sequence matches the access key sequence. Access beyond the restricted access gateway is granted to functions when the recorded entered request sequence matches the access key sequence.Type: GrantFiled: October 5, 2017Date of Patent: October 1, 2019Assignee: International Business Machines CorporationInventors: Keith A. Jenkins, Barry P. Linder
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Publication number: 20190266538Abstract: A computer-implemented method for analyzing customer satisfaction is presented. The computer-implemented method may include capturing visual images related to individuals and order consumables, determining, by a processor, at least one measurable metric to predict variations indicating different satisfaction levels, and dynamically refining parameters if the variations exceed one or more thresholds. The computer-implemented method further includes receiving the captured visual images of the individuals and the order consumables by least one camera in communication with the processor.Type: ApplicationFiled: May 8, 2019Publication date: August 29, 2019Inventors: Karthik Balakrishnan, Keith A. Jenkins, Barry P. Linder
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Patent number: 10388580Abstract: Methods and circuits for monitoring circuit degradation include measuring degradation in a set of on-chip test oscillators that vary according to a quantity that influences a first type of degradation. A second type of contribution to the measured degradation is determined by extrapolating from the measured degradation for the plurality of test oscillators. The second type of contribution is subtracted from the measured degradation at a predetermined value of the quantity to determine the first type of degradation for devices represented by the predetermined value.Type: GrantFiled: March 20, 2018Date of Patent: August 20, 2019Assignee: International Business Machines CorporationInventors: Keith A. Jenkins, Barry Linder
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Patent number: 10365702Abstract: Over at least part of a lifetime of a product circuit, quiescent current to a product circuit is periodically measured. Over the part of the lifetime of the product circuit, voltage to the product circuit is periodically adjusted based on the monitored quiescent current. Methods, apparatus, and computer program product are disclosed. A calibration procedure may also be performed as part of manufacturing the product circuit, in order to provide values for the quiescent current and corresponding voltage to which the voltage should be adjusted.Type: GrantFiled: April 10, 2017Date of Patent: July 30, 2019Assignee: International Business Machines CorporationInventors: Chen-Yong Cher, Pierce I Chuang, Keith A Jenkins, Barry Linder
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Patent number: 10360526Abstract: A computer-implemented method for analyzing customer satisfaction is presented. The computer-implemented method may include capturing visual images related to individuals and order consumables, determining, by a processor, at least one measurable metric to predict variations indicating different satisfaction levels, and dynamically refining parameters if the variations exceed one or more thresholds. The computer-implemented method further includes receiving the captured visual images of the individuals and the order consumables by least one camera in communication with the processor.Type: GrantFiled: July 27, 2016Date of Patent: July 23, 2019Assignee: International Business Machines CorporationInventors: Karthik Balakrishnan, Keith A. Jenkins, Barry P. Linder
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Patent number: 10295589Abstract: Embodiments include methods, and systems of an integrated circuit having electromigration wearout detection circuits. Integrated circuit may include a detection element and a reference element. Detection element is subject to normal operation current. Reference element is not subject to normal operation current. A resistance of detection element is monitored to detect electromigration wearout. The electromigration wearout detection monitoring circuit may be configured to perform: periodically measuring resistance of detection element, calculating resistance change of detection element over a predetermined time period, comparing resistance change of detection element calculated to a predetermined safety threshold, and take mitigation actions when resistance change of detection element exceeds predetermined safety threshold. The mitigation actions may include switching to a redundant circuit of the integrated circuit, shutting down the integrated circuit, and sending a signal to initiate a service call.Type: GrantFiled: March 15, 2016Date of Patent: May 21, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Keith A. Jenkins, Siyuranga O. Koswatta
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Patent number: 10247769Abstract: Methods and systems for measuring degradation includes measuring an initial electrical characteristic of a test device in a ring oscillator that includes multiple oscillator stages, each having a delay stage and one or more fan-out devices, and a test stage having a delay stage and the test device. The ring oscillator is operated for a period of time. The electrical characteristic of the test device is measured after operating the ring oscillator. A level of degradation in the test device is determined using a processor based on the measurements of the electrical characteristic of the test device.Type: GrantFiled: September 2, 2015Date of Patent: April 2, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Barry P. Linder, Keith A. Jenkins
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Publication number: 20180364296Abstract: Methods and systems for measuring degradation includes measuring an initial electrical characteristic of a test device in a ring oscillator that includes multiple oscillator stages and a test stage having a delay stage and the test device. The ring oscillator is operated for a period of time. The electrical characteristic of the test device is measured after operating the ring oscillator. A level of degradation in the test device is determined using a processor based on the measurements of the electrical characteristic of the test device.Type: ApplicationFiled: August 23, 2018Publication date: December 20, 2018Inventors: Barry P. Linder, Keith A. Jenkins