Abstract: A method for forming a dual damascene interconnect in a dielectric layer is provided. Generally, a first aperture is etched in the dielectric. A poison barrier layer is formed over part of the dielectric, which prevents resist poisoning. A patterned mask is formed over the poison barrier layer. A second aperture is etched into the dielectric layer, wherein at least part of the first aperture shares the same area as at least part of the second aperture.

Abstract: A method for forming a dual damascene interconnect in a dielectric layer is provided. Generally, a first aperture is etched in the dielectric. A poison barrier layer is formed over part of the dielectric, which prevents resist poisoning. A patterned mask is formed over the poison barrier layer. A second aperture is etched into the dielectric layer, wherein at least part of the first aperture shares the same area as at least part of the second aperture.

Abstract: A method for forming a dual damascene interconnect in a dielectric layer is provided. Generally, a first aperture is etched in the dielectric. A poison barrier layer is formed over part of the dielectric, which prevents resist poisoning. A patterned mask is formed over the poison barrier layer. A second aperture is etched into the dielectric layer, wherein at least part of the first aperture shares the same area as at least part of the second aperture.

Abstract: Disclosed is the formation of additional lines, either dummy lines or active lines, in an electrically conductive pattern of lines to provide more uniform loading for either etching or chemical/mechanical polishing of a layer of electrically conductive material from which the pattern of lines is formed. Also disclosed is the use of additional or dummy vias to balance the loading during etching of the vias, as well as to provide stress relief for underlying metal in regions or areas having a low density of vias. Further disclosed is the use of a working grid on the integrated circuit structure to analyze the spacing of lines or vias for the above effects.

Abstract: Method and apparatus for forming large scale fields suitable for use in the fabrication of integrated circuit structures having submicron dimensions. The method includes subdividing the large scale field into a plurality of subfields along the boundaries of functional components forming a very large scale integrated circuit. Stitching the subfields into the large scale field is then substantially simplified since the number and dimensions of conductive interconnects between the functional components can be more easily accommodated. The large scale field further includes a custom portion and a standard portion of functional components. Reticle formation of the standard portion involves optical correction techniques. Reticle formation of the custom portion may involve standard reticle formation techniques.

Abstract: A method and apparatus for forming large scale fields suitable for use in the fabrication of integrated circuit structures having submicron dimensions. The method includes subdividing the large scale field into a plurality of subfields along the boundaries of functional components forming a very large scale integrated circuit. Stitching the subfields into the large scale field is then substantially simplified since the number and dimensions of conductive interconnects between the functional components can be more easily accommodated.

Abstract: A process is disclosed for curing a hydrogen silsesquioxane coating material to form SiO.sub.2 by first placing the coating material in a preheated furnace; igniting a plasma ignited in the furnace immediately after insertion of the coating material therein; then raising the temperature of the furnace up to a predetermined curing temperature, while still maintaining the plasma in the chamber; maintaining the coating material at the curing temperature until substantially all of the coating material has cured to form SiO.sub.2 ; and then extinguishing the plasma and cooling the furnace. In another embodiment, the coating material is cured, with or without the assistance of heat and a plasma, in an ultrahigh vacuum, i.e., a vacuum of at least 10.sup.-5 Torr or better, and preferably at least 10.sup.-6 Torr or better.

Abstract: A process is disclosed for curing a hydrogen silsesquioxane coating material to form SiO.sub.2 by first placing the coating material in a preheated furnace; igniting a plasma ignited in the furnace immediately after insertion of the coating material therein; then raising the temperature of the furnace up to a predetermined curing temperature, while still maintaining the plasma in the chamber; maintaining the coating material at the curing temperature until substantially all of the coating material has cured to form SiO.sub.2 ; and then extinguishing the plasma and cooling the furnace. In another embodiment, the coating material is cured, with or without the assistance of heat and a plasma, in an ultrahigh vacuum, i.e., a vacuum of at least 10.sup.-5 Torr or better, and preferably at least 10.sup.-6 Torr or better.