Patents by Inventor Keith Dow

Keith Dow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6950891
    Abstract: A computer system includes a processor and a multi-layer circuit board having a memory unit, a memory control unit, and a data bus coupling the memory control unit to the memory unit. A first signal line is formed on a selected layer of the circuit board and connected between a first pin on the memory unit and the memory control unit. A second signal line is also formed on the selected layer of the circuit board and is connected to the first pin on the memory unit.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: September 27, 2005
    Assignee: Intel Corporation
    Inventor: Keith Dow
  • Patent number: 6934163
    Abstract: In one embodiment, a dummy via is created in a circuit board. The dummy via is positioned and coupled to a portion of a transmission line. This portion of the transmission line is further coupled to a signal lead of a connector, which creates additional capacitance to lower the impedance of the connector.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: August 23, 2005
    Assignee: Intel Corporation
    Inventor: Keith Dow
  • Publication number: 20020176237
    Abstract: In one embodiment, a dummy via is created in a circuit board. The dummy via is positioned and coupled to a portion of a transmission line. This portion of the transmission line is further coupled to a signal lead of a connector, which creates additional capacitance to lower the impedance of the connector.
    Type: Application
    Filed: July 12, 2002
    Publication date: November 28, 2002
    Inventor: Keith Dow
  • Patent number: 6445590
    Abstract: In one embodiment, a dummy via is created in a circuit board. The dummy via is positioned and coupled to a portion of a transmission line. This portion of the transmission line is further coupled to a signal lead of a connector, which creates additional capacitance to lower the impedance of the connector.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: September 3, 2002
    Assignee: Intel Corporation
    Inventor: Keith Dow
  • Patent number: 6446174
    Abstract: A memory system that includes a memory controller hub (MCH) to control access to dynamic random-access memory (DRAM) devices, wherein the MCH has a first channel for communicating with the DRAM devices according to a first protocol. Also included is a memory repeater hub (MRH) of a first type having an input connected to the first channel of the MCH and providing second and third channels as outputs, the second and third channels operating in accordance with the first protocol. A first pair of MRHs of a second type each has an input connected to the second channel, with each providing a pair of DRAM channels that operate in accordance with a second protocol. The system further includes a second pair of MRHs of the second type, each having an input connected to the third channel, with each providing a pair of DRAM channels that operate in accordance with the second protocol.
    Type: Grant
    Filed: July 11, 2000
    Date of Patent: September 3, 2002
    Assignee: Intel Corporation
    Inventor: Keith Dow