Patents by Inventor Keith E. Nelson

Keith E. Nelson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7927927
    Abstract: A semiconductor package substrate (11) has an array of package sites (13, 14, 16, and 21) that are substantially identical. The entire array of package sites (13, 14, 16, and 21) is covered by an encapsulant (19). The individual package sites (13, 14, 16, and 21) are singulated by sawing through the encapsulant (19) and the underlying semiconductor package substrate (11).
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: April 19, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Son Ky Quan, Samuel L. Coffman, Bruce Reid, Keith E. Nelson, Deborah A. Hagen
  • Publication number: 20020053452
    Abstract: A semiconductor package substrate (10) has an array of package sites (13,14,16,21,22, and 23) that are substantially identical. The entire array of package sites (13,14,16,21,22, and 23) is covered by an encapsulant (19). The individual package sites (13,14,16,21,22, and 23) are singulated by sawing through the encapsulant (19) and the underlying semiconductor package substrate (10).
    Type: Application
    Filed: August 13, 2001
    Publication date: May 9, 2002
    Inventors: Son Ky Quan, Samuel L. Coffman, Bruce Reid, Keith E. Nelson, Deborah A. Hagen
  • Patent number: 6093972
    Abstract: A microelectronic package (10) is formed and includes an integrated circuit die (12) attached to a substrate (14) by a plurality of solder bump interconnections (16) to form a preassembly (18). The integrated circuit die (12) has an active face (20) that faces the substrate (14) and is spaced apart therefrom by a gap (22). The integrated circuit die (12) also includes a back face (24) opposite the active face (20). The substrate (14) includes a die attach region (26) and a surrounding region (28) about the integrated circuit die (12). The solder bump interconnections (16) extend across the gap (22) and connect the integrated circuit die (12) and the substrate (14). A mold (30) is disposed about the preassembly (18) such that the mold (30) cooperates with the substrate (14) to define a mold cavity (32) that encloses the integrated circuit die (12).
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: July 25, 2000
    Assignee: Motorola, Inc.
    Inventors: Francis J. Carney, George Amos Carson, Phillip C. Celaya, Harry Fuerhaupter, Frank Tim Jones, Donald H. Klosterman, Cynthia M. Melton, James Howard Knapp, Keith E. Nelson
  • Patent number: 5973337
    Abstract: A semiconductor device (10) coupled to ball grid array substrate (11) and encapsulated by an optically transmissive material (29, 31). The ball grid array substrate (11) has conductive interconnects (14) and a semiconductor receiving area (17) on a top surface and solder pads (13) on a bottom surface. An optoelectronic component (24) is mounted on the semiconductor receiving area (17) and encapsulated with the optically transmissive material (29, 31). Solder balls (18) are formed on the solder pads (13).
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: October 26, 1999
    Assignee: Motorola, Inc.
    Inventors: James H. Knapp, Dwight L. Daniels, Keith E. Nelson, Brian A. Webb
  • Patent number: 5900669
    Abstract: A substrate having a vent (20) and a method of forming the vent (20). A substrate (11) has conductive traces (14) and a semiconductor chip attach pad (17) on a top surface and conductive traces (12) and a bonding pad (13) on the bottom surface. A masking layer (18) is formed over the substrate (11) and openings are formed in the masking layer (18) to expose the conductive traces (14) and a semiconductor chip attach pad (17). The vent (20) is formed in the masking layer (18). A semiconductor chip (31) is mounted to the semiconductor chip attach pad (17). During a step of encapsulating the semiconductor chip (31) with a mold compound, the vent (20) provides pressure relief.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: May 4, 1999
    Assignee: Motorola, Inc.
    Inventors: James H. Knapp, Keith E. Nelson, Les Ticey, Kevin J. Foley
  • Patent number: 5895229
    Abstract: A microelectronic package (10) is formed and includes an integrated circuit die (12) attached to a substrate (14) by a plurality of solder bump interconnections (16) to form a preassembly (18). The integrated circuit die (12) has an active face (20) that faces the substrate (14) and is spaced apart therefrom by a gap (22). The integrated circuit die (12) also includes a back face (24) opposite the active face (20). The substrate (14) includes a die attach region (26) and a surrounding region (28) about the integrated circuit die (12). The solder bump interconnections (16) extend across the gap (22) and connect the integrated circuit die (12) and the substrate (14). A mold (30) is disposed about the preassembly (18) such that the mold (30) cooperates with the substrate (14) to define a mold cavity (32) that encloses the integrated circuit die (12).
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: April 20, 1999
    Assignee: Motorola, Inc.
    Inventors: Francis J. Carney, George Amos Carson, Phillip C. Celaya, Harry Fuerhaupter, Frank Tim Jones, Donald H. Klosterman, Cynthia M. Melton, James Howard Knapp, Keith E. Nelson
  • Patent number: 5776798
    Abstract: A semiconductor package substrate (10) has an array of package sites (13,14,16,21,22, and 23) that are substantially identical. The entire array of package sites (13,14,16,21,22, and 23) is covered by an encapsulant (19). The individual package sites (13,14,16,21,22, and 23) are singulated by sawing through the encapsulant (19) and the underlying semiconductor package substrate (10).
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: July 7, 1998
    Assignee: Motorola, Inc.
    Inventors: Son Ky Quan, Samuel L. Coffman, Bruce Reid, Keith E. Nelson, Deborah A. Hagen
  • Patent number: 5468910
    Abstract: A method for making an improved semiconductor device package is provided. A semiconductor die (16) is attached to a supportive substrate (10, 12). A protective lid (20) is attached to the supportive substrate (10, 12), over the semiconductor die (16). The protective lid (20) is partially encapsulated with molding compound (28). The protective lid (20) prevents the molding compound (30) from contacting the semiconductor die (16), and associated wirebonded wires (18). A portion (30) of the protective lid (20) remains exposed. Thus, a molded package compatible with current product designs and assembly processes is provided, yet disadvantages caused by molding compound contacting the die (16) and wires (18) are avoided. Furthermore, the exposed protective lid (30) provides superior heat dissipation for the package.
    Type: Grant
    Filed: January 19, 1995
    Date of Patent: November 21, 1995
    Assignee: Motorola, Inc.
    Inventors: James H. Knapp, Keith E. Nelson
  • Patent number: 5182071
    Abstract: Molding carrier structures to leads of existing semiconductor packages is accomplished by molding at temperatures which maintain approximately matched thermal expansion between an encapsulating material and leads of the semiconductor package. The matched thermal expansion is provided by molding at temperatures below that which is required for glass transition of the encapsulating material. Molding at such temperatures is facilitated by a molding assembly that has a molding pot with an irregular shaped bottom which fluidizes the encapsulating material at low temperatures. Molding at temperatures that essentially match thermal expansion between the package's leads and the encapsulating material prevents damaging the leads of the package.
    Type: Grant
    Filed: December 14, 1990
    Date of Patent: January 26, 1993
    Assignee: Motorola, Inc.
    Inventors: James H. Knapp, Keith E. Nelson
  • Patent number: 4725388
    Abstract: A vessel for holding at least one test sample to be measured for its fluorescence, wherein the vessel is formed from a material having a native fluorescence, and wherein the vessel is provided with a barrier which blocks penetration or at least reduces the extent of penetration of an exciting light into the vessel's fluorescable material to prevent fluorescent excitation of the vessel or at least reduces the extent to which the vessel is fluorescently excited when exposed to an exciting light during the fluorometric measurement.
    Type: Grant
    Filed: February 6, 1987
    Date of Patent: February 16, 1988
    Assignee: Dynatech Laboratories, Inc.
    Inventors: Keith E. Nelson, Claude C. Crawford
  • Patent number: 4501970
    Abstract: A sensitive frontal approach fluorometer which is suitable for measuring the fluorescence of samples in open top microtest wells and which has an optical system for (a) directing an exciting light downwardly into the well's open top to fluorescently excite the sample and (b) detecting the sample's emitted light which passes upwardly through the well's open top.
    Type: Grant
    Filed: October 12, 1982
    Date of Patent: February 26, 1985
    Assignee: Dynatech Laboratories Incorporated
    Inventor: Keith E. Nelson
  • Patent number: 3993075
    Abstract: A small, disposable cryosurgical probe having a self-contained liquid refrigerant supply can be operated in either a freeze mode or a defrost mode. During the freeze mode the refrigerant is conducted from the supply to the probe tip as a two phase fluid so that the probe can freeze tissue for a relatively long period with a limited refrigerant supply. To facilitate detaching the probe tip from tissue, a button on the probe is depressed which switches the probe to its defrost mode of operation wherein room temperature liquid refrigerant is conducted directly from the supply to the probe tip thereby immediately warming the tip. The probe may be cycled several times between its freeze and defrost modes before the refrigerant supply is exhausted.
    Type: Grant
    Filed: December 24, 1975
    Date of Patent: November 23, 1976
    Assignee: Dynatech Corporation
    Inventors: Wayne F. Lisenbee, Keith E. Nelson
  • Patent number: 3951152
    Abstract: A small, self-contained, disposable cryosurgical probe has a pencil-like housing with a refrigerant-containing cartridge in the housing and a hollow tip projecting from the housing. A small diameter capillary tube has one end in the housing opposite the cartridge and its other end extending into the tip with the intervening length of the tube formed into a multi-turn coil. The refrigerant is conducted from the cartridge through the tube to the probe tip and the temperature of the refrigerant is stabilized so as to maintain a substantially uniform mass flow rate of refrigerant through the tube to the tip.
    Type: Grant
    Filed: February 14, 1975
    Date of Patent: April 20, 1976
    Assignee: Dynatech Corporation
    Inventors: William H. Crandell, Wayne F. Lisenbee, Keith E. Nelson