Patents by Inventor Keith J. Lunzer

Keith J. Lunzer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140189163
    Abstract: Memory system controllers can include a host bus adapter (HBA) and a serial advanced technology attachment (SA) programming compliant device coupled to the HBA via a function-specific interconnect configured to simultaneously transfer a command, a response, and other information between the HBA and the SA programming compliant device.
    Type: Application
    Filed: December 16, 2013
    Publication date: July 3, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Michael A. Erdmann, Keith J. Lunzer, Joseph M. Jeddeloh
  • Patent number: 8621113
    Abstract: Memory system controllers can include a host bus adapter (HBA) and a serial advanced technology attachment (SA) programming compliant device coupled to the HBA via a function-specific interconnect configured to simultaneously transfer a command, a response, and other information between the HBA and the SA programming compliant device.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: December 31, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Michael A. Erdmann, Keith J. Lunzer, Joseph M. Jeddeloh
  • Publication number: 20120311193
    Abstract: Memory system controllers can include a host bus adapter (HBA) and a serial advanced technology attachment (SA) programming compliant device coupled to the HBA via a function-specific interconnect configured to simultaneously transfer a command, a response, and other information between the HBA and the SA programming compliant device.
    Type: Application
    Filed: May 31, 2011
    Publication date: December 6, 2012
    Applicant: Micron Technology, Inc.
    Inventors: Michael A. Erdmann, Keith J. Lunzer, Joseph M. Jeddeloh
  • Patent number: 7284169
    Abstract: Write strobe preamble/postamble test circuitry includes a test signal generator generating first and second digital signals. Also included are a pair of phase interpolators for varying the transition times of respective transmitter clock signals. When enabled, a transmitter uses the transmitter clock signals to transmit a write data strobe signal corresponding to the first and second digital signals to memory devices being tested. The transmitter is enabled by an enable signal generated by a third phase interpolator. By varying the timing of the enable signal, the third phase interpolator can vary the duration of preambles and postambles of respective write data strobe signals.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: October 16, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Paul A. LaBerge, Keith J. Lunzer