Patents by Inventor Keith Koai

Keith Koai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9281221
    Abstract: One or more techniques or systems for ultra-high vacuum (UHV) wafer processing are provided herein. In some embodiments, a vacuum system includes one or more cluster tools connected via one or more bridges. For example, a first cluster tool is connected to a first bridge. Additionally, a second cluster tool is connected to a second bridge. In some embodiments, the first bridge is configured to connect the second cluster tool to the first cluster tool. In some embodiments, the second cluster tool is connected to the first bridge, thus forming a ‘tunnel’. In some embodiments, the second bridge comprises one or more facets configured to enable a connection to an additional process chamber or an additional cluster tool. In this manner, a more efficient UHV environment is provided, thus enhancing a yield associated with wafer processing, for example.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: March 8, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chung-En Kao, Tien-Chen Hu, Mao-Lin Kao, Kuo-Fu Chien, Keith Koai
  • Publication number: 20140140792
    Abstract: One or more techniques or systems for ultra-high vacuum (UHV) wafer processing are provided herein. In some embodiments, a vacuum system includes one or more cluster tools connected via one or more bridges. For example, a first cluster tool is connected to a first bridge. Additionally, a second cluster tool is connected to a second bridge. In some embodiments, the first bridge is configured to connect the second cluster tool to the first cluster tool. In some embodiments, the second cluster tool is connected to the first bridge, thus forming a ‘tunnel’. In some embodiments, the second bridge comprises one or more facets configured to enable a connection to an additional process chamber or an additional cluster tool. In this manner, a more efficient UHV environment is provided, thus enhancing a yield associated with wafer processing, for example.
    Type: Application
    Filed: November 16, 2012
    Publication date: May 22, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chung-En Kao, Tien-Chen Hu, Mao-Lin Kao, Kuo-Fu Chien, Keith Koai
  • Publication number: 20060240542
    Abstract: An apparatus for positioning a substrate support within a processing chamber is provided. In one embodiment, an apparatus for positioning a substrate support includes a yoke comprising a curved surface with a first slot formed therethrough, a base comprising a first surface adapted to support the substrate support and a curved second surface, wherein the curved second surface mates with the curved surface of the yoke and a first slot is formed through the curved second surface of the base, and a first threaded member disposed through the first slot in the yoke and the first slot in the base.
    Type: Application
    Filed: June 26, 2006
    Publication date: October 26, 2006
    Inventors: Eric Schieve, Keith Koai, David Or, Rene Correa
  • Publication number: 20050194100
    Abstract: A substrate support is provided that features a lift pin having at least one larger diameter shoulder section that forms a relief region between the lift pin and a guide hole disposed through a substrate support. The shoulder section minimizes contact between the substrate support and lift pin guide hole, thereby reducing pin scratching, particle generation, component wear, and increasing the useful life of the pin. In another embodiment, a flat-bottom tip is provided to promote self-standing of the lift pin, reducing pin tilting or leaning of the lift pin within the guide hole.
    Type: Application
    Filed: May 3, 2005
    Publication date: September 8, 2005
    Inventors: David Or, Keith Koai, Hiroyuki Takahama, Takahiro Ito, Koji Ota, Hiroshi Sato
  • Patent number: 6410089
    Abstract: A showerhead used for dispensing gas over a wafer in chemical vapor deposition (CVD), especially for CVD of copper in a thermal process using a precursor such as HFAC-Cu-TMVS. The patterns of holes is tailored to compensate for thermal and other effects, in particular by increasing the density of holes toward the periphery of the wafer in three or more zones. Such a variable pattern is particularly useful for liquid precursors that are atomized in a carrier gas, in which case a second perforated plate in back of the showerhead face can be eliminated, thereby reducing the flow impedance and the required pressure of the liquid-entrained gas, which tends to deposit out at higher pressures. The reduced flow impedance is particularly useful for CVD of copper.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: June 25, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Xin Sheng Guo, Keith Koai, Ling Chen, Mohan K. Bhan, Bo Zheng
  • Patent number: 6106625
    Abstract: A plasma reaction chamber particularly configured for chemical vapor deposition of titanium nitride with a TDMAT precursor, the deposition including a plasma step. Gas is injected from a gas cavity in a showerhead electrode assembly through a large number of showerhead holes into the processing region over the wafer. The showerhead electrode is capable of being RF energized to create a plasma of a gas in the processing region. The showerhead electrode and other parts of the assembly are cooled by a cooling plate disposed above the gas cavity and connected to a rim of the showerhead electrode. A convolute water-cooling channel is formed in the cooling plate having a small cross section and numerous bends so as to create turbulent flow, thus aiding thermal transfer. The water cooling plate is connected to the showerhead electrode across a large horizontal interface, thus also aiding thermal flow.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: August 22, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Keith Koai, Mark Johnson, Mei Chang, Lawrence Chung Lei
  • Patent number: 6063441
    Abstract: A substrate processing chamber, particularly a chemical vapor deposition (CVD) chamber used both for thermal deposition of a conductive material and a subsequently performed plasma process. The invention reduces thermal deposition of the conductive material on peripheral portions of the pedestal supporting a wafer and in a pumping channel exhausting the chamber. A peripheral ring placed on the pedestal, preferably also used to center the wafer, is thermally isolated from the pedestal so that its temperature is kept substantially lower than that of the wafer. The processing chamber includes a chamber lid assembly having an isolator ring member that has a sloping surface for confirming the plasma within a processing zone of the processing chamber while the wafer is being processed therein. A method for forming a CVD layer on a wafer comprising elevating the pedestal until an upper pedestal surface of the pedestal extends above a lower edge of the isolator ring member.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: May 16, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Keith Koai, Lawrence Chung-Lai Lei, Mei Chang, Mark S. Johnson
  • Patent number: 6050506
    Abstract: A showerhead used for dispensing gas over a wafer in chemical vapor deposition (CVD), especially for CVD of metals. The patterns of holes is tailored to compensate for thermal and other effects, in particular by increasing the density of holes toward the periphery of the wafer in three or more zones. Such a variable pattern is particularly useful for liquid precursors that are atomized in a carrier gas, in which case a second perforated plate in back of the showerhead face can be eliminated, thereby reducing the flow impedance and the required pressure of the liquid-entrained gas, which tends to deposit out at higher pressures. The reduce flow impedance is particularly useful for CVD of copper.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: April 18, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Xin Sheng Guo, Keith Koai, Ling Chen, Mohan K. Bhan, Bo Zheng