Patents by Inventor Keith Marks
Keith Marks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12007803Abstract: A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit.Type: GrantFiled: July 26, 2023Date of Patent: June 11, 2024Assignee: pSemi CorporationInventors: Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta
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Publication number: 20240159428Abstract: A portable bath tub water heater is provided that includes a water pump and a heating element to heat water in a bath tub, wherein the portable bath tub water heater is configured to recirculate bath tub water using inlet and outlet tubes at least partially submerged in the water. The portable bath tub water heater is configured to be disposed on and/or nearby the bath tub in any number of different ways. After usage, the portable bath tub water heater may be purged of any remaining water and stored for future use.Type: ApplicationFiled: November 14, 2023Publication date: May 16, 2024Inventors: Christopher Mark Hayden, Harsha Satyanarayana, Sherri Burkett, Thanh Hoang Dao, Keith James Monks, Anthony Hurgoi
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Publication number: 20240126026Abstract: An apparatus implements high density fiber panel organization. The apparatus includes a module configured to be secured to a panel of a 1 U rack. The apparatus further includes a front end of the module. The apparatus further includes a height of the front end corresponding to a height of a 1 U rack. The apparatus further includes an aspect ratio of the front end greater than 0.7. The aspect ratio is identified by the height of the front end divided by a width of the front end.Type: ApplicationFiled: November 29, 2023Publication date: April 18, 2024Applicant: viaPhoton, Inc.Inventors: Walter Mark HENDRIX, Keith Samuel MARANTO, Mark James SMRHA, Wade James WOMACK, James Patrick NOLAN, Eric Russell KLOOTWYK, Nathan Eric BENTON
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Publication number: 20240126035Abstract: An apparatus implements high density fiber panel organization. The apparatus includes a module configured to be secured to a panel of a 1 U rack. The apparatus further includes a front end of the module. The apparatus further includes a height of the front end corresponding to a height of a 1 U rack. The apparatus further includes an aspect ratio of the front end greater than 0.75. The aspect ratio is identified by the height of the front end divided by a width of the front end.Type: ApplicationFiled: October 16, 2023Publication date: April 18, 2024Inventors: Walter Mark HENDRIX, Keith Samuel MARANTO, Mark James SMRHA, Wade James WOMACK, James Patrick NOLAN, Eric Russell KLOOTWYK, Nathan Eric BENTON
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Patent number: 11955932Abstract: Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.Type: GrantFiled: May 23, 2023Date of Patent: April 9, 2024Assignee: pSemi CorporationInventors: Jonathan James Klaren, David Kovac, Eric S. Shapiro, Christopher C. Murphy, Robert Mark Englekirk, Keith Bargroff, Tero Tapio Ranta
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Publication number: 20240113509Abstract: A system implements a surge protection bus bar. The system includes a surge protection device that includes a connection point. The system further includes a carrier assembly juxtaposed to the surge protection device. The carrier assembly includes an interconnection point, an attachment point, and a rigid bar connecting between an interconnection point and the attachment point. A proximal end of the rigid bar integrally forms the interconnection point and a distal end of the rigid bar includes the attachment point.Type: ApplicationFiled: September 28, 2023Publication date: April 4, 2024Applicant: viaPhoton, Inc.Inventors: Walter Mark HENDRIX, Elizabeth Grace DABDOUB, Keith Samuel MARANTO, Mark James SMRHA
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Patent number: 11948897Abstract: Integrated circuits (ICs) that avoid or mitigate creation of changes in accumulated charge in a silicon-on-insulator (SOI) substrate, particularly an SOI substrate having a trap rich layer. In one embodiment, a FET is configured such that, in a standby mode, the FET is turned OFF while maintaining essentially the same VDS as during an active mode. In another embodiment, a FET is configured such that, in a standby mode, current flow through the FET is interrupted while maintaining essentially the same VGS as during the active mode. In another embodiment, a FET is configured such that, in a standby mode, the FET is switched into a very low current state (a “trickle current” state) that keeps both VGS and VDS close to their respective active mode operational voltages. Optionally, S-contacts may be formed in an IC substrate to create protected areas that encompass FETs that are sensitive to accumulated charge effects.Type: GrantFiled: February 11, 2022Date of Patent: April 2, 2024Assignee: pSemi CorporationInventors: Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta, Simon Edward Willard
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Publication number: 20240094757Abstract: A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit.Type: ApplicationFiled: July 26, 2023Publication date: March 21, 2024Inventors: Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta
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Publication number: 20240083856Abstract: The present invention provides crystalline forms of (E)-6-(4-Phenylcyclohexyl)-5-(3-trifluoromethylbenzyl)-1H-pyrimidine-2,4-dione, and methods of making and using the same.Type: ApplicationFiled: August 7, 2023Publication date: March 14, 2024Inventors: Hazel Joan Hunt, Lorraine Donaghy, Keith Lorimer, Nathan Jay Dixon, Jeffrey Mark Dener
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Patent number: 11471724Abstract: A rooftop mount device for connecting to a roof of a portable gym and for attaching exercise equipment is described. The portable gym is a portable container, such as a shipping container, having a top surface, or roof, to which the rooftop mount is attachable. The rooftop mount device includes connection members. The rooftop mount can also include one or more horizontal stabilization members and equipment attachment elements. The connection members are attached to a roof of the container. Exercise equipment is attached to the parts of the rooftop mount device. The rooftop mount provides proper height and stability for the bars, racks, stands, cages, rigs and riggings, and other exercise equipment that are attached to the container's roof so that the equipment does not move during use by an exerciser. Systems and kits are also described, which include a rooftop mount device, various exercise equipment, and a portable container.Type: GrantFiled: January 22, 2020Date of Patent: October 18, 2022Assignee: Sportslinq LLCInventors: Keith Mark Dery, Donald D. Fink, Stephen Fink, Steve Yang
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Patent number: 10949328Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.Type: GrantFiled: July 3, 2019Date of Patent: March 16, 2021Assignee: Wave Computing, Inc.Inventors: Keith Mark Evans, Stephen Curtis Johnson
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Publication number: 20200230458Abstract: A rooftop mount device for connecting to a roof of a portable gym and for attaching exercise equipment is described. The portable gym is a portable container, such as a shipping container, having a top surface, or roof, to which the rooftop mount is attachable. The rooftop mount device includes connection members. The rooftop mount can also include one or more horizontal stabilization members and equipment attachment elements. The connection members are attached to a roof of the container. Exercise equipment is attached to the parts of the rooftop mount device. The rooftop mount provides proper height and stability for the bars, racks, stands, cages, rigs and riggings, and other exercise equipment that are attached to the container's roof so that the equipment does not move during use by an exerciser. Systems and kits are also described, which include a rooftop mount device, various exercise equipment, and a portable container.Type: ApplicationFiled: January 22, 2020Publication date: July 23, 2020Applicant: Sportslinq LLCInventors: Keith Mark Dery, Donald D. Fink, Stephen Fink, Steve Yang
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Publication number: 20190324888Abstract: Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.Type: ApplicationFiled: July 3, 2019Publication date: October 24, 2019Inventors: Keith Mark Evans, Stephen Curtis Johnson
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Publication number: 20190228037Abstract: Techniques are disclosed for checkpointing data flow graph computation for machine learning. Processing elements within a reconfigurable fabric are configured to implement a data flow graph. Nodes of the data flow graph can include variable nodes. The processing elements are loaded with process agents. Valid data is executed by a first process agent. The first process agent corresponds to a starting node of the data flow graph. Invalid data is sent to the first process agent. The invalid data initiates a checkpoint operation for the data flow graph. Invalid data is propagated from the starting node of the data flow graph to other nodes within the data flow graph. The variable nodes are paused upon receiving invalid data. Paused variable nodes within the data flow graph are restarted by issuing a run command, and valid data is sent to the starting node of the data flow graph.Type: ApplicationFiled: March 29, 2019Publication date: July 25, 2019Inventors: Christopher John Nicol, Keith Mark Evans, Mehran Ramezani
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Publication number: 20190197018Abstract: Techniques are disclosed for dynamic reconfiguration using data transfer control. Clusters on a reconfigurable fabric are accessed to implement a logical operation. The logical operation can include a Boolean operation, a matrix operation, a tensor operation, etc. Clusters from the plurality of clusters are provisioned for implementation of a first agent on the reconfigurable fabric. The clusters can include quads. The one or more clusters provisioned for the first agent include a first data transfer control block. Additional clusters from the plurality of clusters are provisioned for implementation of a second agent on the reconfigurable fabric. The additional clusters provisioned for the second agent include a second data transfer control block. The logical operation is performed using the first agent. Control information is transferred from the first data transfer control block to the second data transfer control block.Type: ApplicationFiled: March 1, 2019Publication date: June 27, 2019Inventors: Keith Mark Evans, Christopher John Nicol, Mehran Ramezani
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Publication number: 20130290218Abstract: A regulatory compliance management system, method, and program for regulatory compliance management are provided.Type: ApplicationFiled: March 15, 2013Publication date: October 31, 2013Applicant: ASCENDANT COMPLIANCE MANAGEMENTInventors: Jacqueline MERWIN, Jon HIGGINS, Christopher HARDY, Keith MARKS
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Patent number: D260396Type: GrantFiled: November 17, 1978Date of Patent: August 25, 1981Assignee: Rodale Press, Inc.Inventor: Keith Marks