Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.

Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.

Abstract: Systems and methods for using a design for manufacturing (DFM) structure to detect an overlay shift. The DFM structure comprises four branches with transistors and switches connected to a switch control. The first branch measures a current-voltage characteristic corresponding to the overlay shift in a first direction using a first switch. A second branch measures the current-voltage characteristic corresponding to the overlay shift in a second direction using a second switch. A third branch measures the current-voltage characteristic corresponding to the overlay shift in a third direction using a third switch. A fourth branch measures the current-voltage characteristic corresponding to the overlay shift in a fourth direction using a fourth switch. The switches are connected to a switch control configured to active each of the switches to measure the current-voltage characteristic, such that the value of the current-voltage characteristic indicates an overlay shift in an integrated circuit of a die.

Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.

Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.

Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.

Abstract: An N×M crosspoint switch allows a signal from any one of the N inputs to be routed to one or more of the M crosspoint switch outputs. The switches within the crosspoint switch can be configured as voltage mode or current mode switches. In voltage mode switching an input to the crosspoint switch is provided to an input device, such as an amplifier, having a low output impedance. The output of the low impedance device is provided to a switch that connects the output of the low impedance device to a high input impedance device, such as a band translation device. In current mode switching, the low impedance output of the input device is connected to selectively activated high isolation transconductance devices having high input impedances. The outputs of the transconductance devices are connected to low impedance devices that operate as summing nodes.

Abstract: An N×M crosspoint switch allows a signal from any one of the N inputs to be routed to one or more of the M crosspoint switch outputs. The switches within the crosspoint switch can be configured as voltage mode or current mode switches. In voltage mode switching an input to the crosspoint switch is provided to an input device, such as an amplifier, having a low output impedance. The output of the low impedance device is provided to a switch that connects the output of the low impedance device to a high input impedance device, such as a band translation device. In current mode switching, the low impedance output of the input device is connected to selectively activated high isolation transconductance devices having high input impedances. The outputs of the transconductance devices are connected to low impedance devices that operate as summing nodes.

Abstract: An N×M crosspoint switch allows a signal from any one of the N inputs to be routed to one or more of the M crosspoint switch outputs. The switches within the crosspoint switch can be configured as voltage mode or current mode switches. In voltage mode switching an input to the crosspoint switch is provided to an input device, such as an amplifier, having a low output impedance. The output of the low impedance device is provided to a switch that connects the output of the low impedance device to a high input impedance device, such as a band translation device. In current mode switching, the low impedance output of the input device is connected to selectively activated high isolation transconductance devices having high input impedances. The outputs of the transconductance devices are connected to low impedance devices that operate as summing nodes.