Patents by Inventor Keith Rampmeier

Keith Rampmeier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240421817
    Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Inventors: Robert Mark ENGLEKIRK, Keith RAMPMEIER, Arpita Moghe CHADHA
  • Patent number: 11894840
    Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: February 6, 2024
    Assignee: pSemi Corporation
    Inventors: Robert Mark Englekirk, Keith Rampmeier, Arpita Moghe Chadha
  • Publication number: 20230318598
    Abstract: Circuits and methods for determining the characteristics of swappable pins in a peripheral in a 1-Wire or similar single-conductor system, thereby allowing each one of two pins to be either an I/O pin (connected to an I/O line) or a CAP pin (connected to a storage capacitor). Embodiments may utilize a hybrid buffer circuit that utilizes an effectively bi-directional PFET pull-up device coupled between the swappable pins A and B. Two open-drain NFETs pull-down devices are used, one on either side of the PFET and coupled to a respective pin (A or B), but with only one NFET being selected to be operable based on pin-determination flag signals from the pin detection circuitry. Such a hybrid buffer circuit would consume significantly less IC area than two complete conventional buffers, resulting in less leakage and less yield loss.
    Type: Application
    Filed: April 1, 2022
    Publication date: October 5, 2023
    Inventors: Robert Mark Englekirk, Keith Rampmeier, Arpita Moghe Chadha
  • Patent number: 7526264
    Abstract: An N×M crosspoint switch allows a signal from any one of the N inputs to be routed to one or more of the M crosspoint switch outputs. The switches within the crosspoint switch can be configured as voltage mode or current mode switches. In voltage mode switching an input to the crosspoint switch is provided to an input device, such as an amplifier, having a low output impedance. The output of the low impedance device is provided to a switch that connects the output of the low impedance device to a high input impedance device, such as a band translation device. In current mode switching, the low impedance output of the input device is connected to selectively activated high isolation transconductance devices having high input impedances. The outputs of the transconductance devices are connected to low impedance devices that operate as summing nodes.
    Type: Grant
    Filed: September 30, 2006
    Date of Patent: April 28, 2009
    Assignee: RF Magic, Inc.
    Inventors: Keith Bargroff, Bert Fransis, Keith Rampmeier, Raducu Lazarescu, Kostas Papathanasiou, Esa Tarvainen, Tony Mellissonos, Donghai Wang
  • Publication number: 20070087712
    Abstract: An N×M crosspoint switch allows a signal from any one of the N inputs to be routed to one or more of the M crosspoint switch outputs. The switches within the crosspoint switch can be configured as voltage mode or current mode switches. In voltage mode switching an input to the crosspoint switch is provided to an input device, such as an amplifier, having a low output impedance. The output of the low impedance device is provided to a switch that connects the output of the low impedance device to a high input impedance device, such as a band translation device. In current mode switching, the low impedance output of the input device is connected to selectively activated high isolation transconductance devices having high input impedances. The outputs of the transconductance devices are connected to low impedance devices that operate as summing nodes.
    Type: Application
    Filed: September 30, 2006
    Publication date: April 19, 2007
    Applicant: RF Magic, Inc.
    Inventors: Keith Bargroff, Bert Fransis, Keith Rampmeier, Raducu Lazarescu, Kostas Papathanasiou, Esa Tarvainen, Tony Mellissinos, Donghai Wang
  • Publication number: 20050005296
    Abstract: An N×M crosspoint switch allows a signal from any one of the N inputs to be routed to one or more of the M crosspoint switch outputs. The switches within the crosspoint switch can be configured as voltage mode or current mode switches. In voltage mode switching an input to the crosspoint switch is provided to an input device, such as an amplifier, having a low output impedance. The output of the low impedance device is provided to a switch that connects the output of the low impedance device to a high input impedance device, such as a band translation device. In current mode switching, the low impedance output of the input device is connected to selectively activated high isolation transconductance devices having high input impedances. The outputs of the transconductance devices are connected to low impedance devices that operate as summing nodes.
    Type: Application
    Filed: December 11, 2003
    Publication date: January 6, 2005
    Inventors: Keith Bargroff, Bert Fransis, Keith Rampmeier, Raducu Lazarescu, Kostas Papathanasiou, Esa Tarvainen, Tony Mellissinos, Donghai Wang