Patents by Inventor Keith Underwood
Keith Underwood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250064085Abstract: The present disclosure relates generally to soybean products derived from high protein soybeans, and more specifically to soybean compositions having high protein content and methods of preparing and using such protein enriched soybean compositions. The present disclosure also relates to uses of the protein enriched soybean compositions in food products.Type: ApplicationFiled: December 29, 2022Publication date: February 27, 2025Applicant: Benson Hill, Inc.Inventors: Keith PETROFSKY, Kip UNDERWOOD, Jason F. LOMBARDI, Michael W. GIBSON, Savitha G. CHELLADURAI, Trent L. COLLINS, Anthony J. KINGSLEY, Ali RASHID NIAGHI, Dustin A. BRUCKER
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Patent number: 11456972Abstract: Logic may store at least a portion of an incoming packet at a memory location in a host device in response to a communication from the host device. Logic may compare the incoming packet to a digest in an entry of a primary array. When the incoming packet matches the digest, logic may retrieve a full entry from the secondary array and compare the full entry with the first incoming packet. When the full entry matches the first incoming packet, logic may store at least a portion of the first incoming packet at the memory location. And, in the absence of a match between the first incoming packet and the digest or full entry, logic may compare the first incoming packet to subsequent entries in the primary array to identify a full entry in the secondary array that matches the first incoming packet.Type: GrantFiled: March 30, 2018Date of Patent: September 27, 2022Assignee: INTEL CORPORATIONInventors: Keith Underwood, Karl Brummel, John Greth
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Patent number: 11150967Abstract: Methods, software, and systems for improved data transfer operations using overlapped rendezvous memory registration. Techniques are disclosed for transferring data between a first process operating as a sender and a second process operating as a receiver. The sender sends a PUT request message to the receiver including payload data stored in a send buffer and first and second match indicia. The first match indicia is used to determine whether the PUT request is expected or unexpected. If the PUT request is unexpected, an RMA GET operation is performed using the second matching indicia to pull data from the send buffer and write the data to a memory region in the user space of the process associated with the receiver. If the PUT request message is expected, the data payload with the PUT request is written to a receive buffer on the receiver determined using the first match indicia.Type: GrantFiled: September 30, 2017Date of Patent: October 19, 2021Assignee: Intel CorporationInventors: Sayantan Sur, Keith Underwood, Ravindra Babu Ganapathi, Andrew Friedley
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Patent number: 11048313Abstract: Described herein are automated hierarchical feed-back driven control mechanisms and methods, including an apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may be operable to receive a system operating characteristic guidance. The second circuitry may be operable to provide one or more manufacturing characteristics. The third circuitry may be operable to store one or more system operating characteristics based upon the system operating characteristic guidance and the one or more manufacturing characteristics.Type: GrantFiled: March 29, 2019Date of Patent: June 29, 2021Assignee: Intel CorporationInventors: Siddhartha Jana, Federico Ardanaz, Jonathan M. Eastep, Yaxin Shui, Keith Underwood
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Publication number: 20200310515Abstract: Described herein are automated hierarchical feed-back driven control mechanisms and methods, including an apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may be operable to receive a system operating characteristic guidance. The second circuitry may be operable to provide one or more manufacturing characteristics. The third circuitry may be operable to store one or more system operating characteristics based upon the system operating characteristic guidance and the one or more manufacturing characteristics.Type: ApplicationFiled: March 29, 2019Publication date: October 1, 2020Applicant: Intel CorporationInventors: Siddhartha Jana, Federico Ardanaz, Jonathan M. Eastep, Yaxin Shui, Keith Underwood
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Publication number: 20190102236Abstract: Methods, software, and systems for improved data transfer operations using overlapped rendezvous memory registration. Techniques are disclosed for transferring data between a first process operating as a sender and a second process operating as a receiver. The sender sends a PUT request message to the receiver including payload data stored in a send buffer and first and second match indicia. Subsequent to or in conjunction with sending the PUT request message, the send buffer is exposed on the sender. The first match indicia is used to determine whether the PUT request is expected or unexpected. If the PUT request is unexpected, an RMA GET operation is performed using the second matching indicia to pull data from the send buffer and write the data to a memory region in the user space of the process associated with the receiver. The RMA GET operation may be retried one or more times in the event that the send buffer has yet to be exposed.Type: ApplicationFiled: September 30, 2017Publication date: April 4, 2019Inventors: Sayantan Sur, Keith Underwood, Ravindra Babu Ganapathi, Andrew Friedley
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Publication number: 20190044890Abstract: Logic may store at least a portion of an incoming packet at a memory location in a host device in response to a communication from the host device. Logic may compare the incoming packet to a digest in an entry of a primary array. When the incoming packet matches the digest, logic may retrieve a full entry from the secondary array and compare the full entry with the first incoming packet. When the full entry matches the first incoming packet, logic may store at least a portion of the first incoming packet at the memory location. And, in the absence of a match between the first incoming packet and the digest or full entry, logic may compare the first incoming packet to subsequent entries in the primary array to identify a full entry in the secondary array that matches the first incoming packet.Type: ApplicationFiled: March 30, 2018Publication date: February 7, 2019Applicant: INTEL CORPORATIONInventors: Keith Underwood, Karl Brummel, John Greth
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Patent number: 10200310Abstract: In an example, there is disclosed a compute node, comprising: first one or more logic elements comprising a data producer engine to produce a datum; and a host fabric interface to communicatively couple the compute node to a fabric, the host fabric interface comprising second one or more logic elements comprising a data pulling engine, the data pulling engine to: publish the datum as available; receive a pull request for the datum, the pull request comprising a node identifier for a data consumer; and send the datum to the data consumer via the fabric. There is also disclosed a method of providing a data pulling engine.Type: GrantFiled: December 24, 2015Date of Patent: February 5, 2019Assignee: Intel CorporationInventors: James Dinan, Mario Flajslik, Keith Underwood, David Keppel, Ulf Rainer Hanebutte
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Publication number: 20190032321Abstract: In a Regenerative Stormwater Conveyance (RSC) system, rather than increase base flow by putting a horizontal layer of clay and silts in the entire streambed, constructing vertical irrigation curtains with clay rich soil to interrupt the groundwater flow at certain intervals will increase surface water base flows and improve habitat and water quality while also improving the interactions between the hyporheic zones and the channel. Also, by initially providing a subsurface flow channel through which water can flow, for example, using a perforated pipe, and building an access road over that channel during construction, erosion in the RSC project area can be significantly reduced or eliminated.Type: ApplicationFiled: July 27, 2018Publication date: January 31, 2019Inventor: Keith Underwood
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Patent number: 10044626Abstract: In an embodiment, an out-of-order, reliable, end-to-end protocol is provided that can enable direct user-level data placement and atomic operations between nodes of a multi-node network. The protocol may be optimized for low-loss environments such as High Performance Computing (HPC) applications, and may enable loss detection and de-duplication of packets through the use of a robust window state manager at a target node. A multi-node network implementing the protocol may have increased system reliability, packet throughput, and increased tolerance for adaptively routed traffic, while still allowing atomic operations to be idempotently applied directly to a user memory location.Type: GrantFiled: December 24, 2015Date of Patent: August 7, 2018Assignee: Intel CorporationInventors: Keith Underwood, Charles Giefer, Mark Debbage, Karl P. Brummel, Nathan Miller, Bruce Pirie
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Patent number: 9852107Abstract: Techniques are disclosed for algorithmic mapping of logical process identifiers in order to provide highly-scalable end-point addressing in multi-node systems capable of performing massively parallel applications. In particular, nodes initiating inter-process communication with a target process may use an initiator-side translation process that performs an algorithmic mapping to translate a logical process identifier (e.g., a rank/processing element) into a target physical node identifier and a target local process identifier. The initiating node may then use hardware fabric of a multi-node network to route the inter-process communication to an appropriate node. A node may receive an inter-process communication and may use a target-side translation process in hardware to translate the target virtual process identifier into a local process identifier for the node.Type: GrantFiled: December 24, 2015Date of Patent: December 26, 2017Assignee: INTEL CORPORATIONInventors: Keith Underwood, Charles F. Giefer, David Addison
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Publication number: 20170185561Abstract: In an example, there is disclosed a compute node, comprising: first one or more logic elements comprising a data producer engine to produce a datum; and a host fabric interface to communicatively couple the compute node to a fabric, the host fabric interface comprising second one or more logic elements comprising a data pulling engine, the data pulling engine to: publish the datum as available; receive a pull request for the datum, the pull request comprising a node identifier for a data consumer; and send the datum to the data consumer via the fabric. There is also disclosed a method of providing a data pulling engine.Type: ApplicationFiled: December 24, 2015Publication date: June 29, 2017Applicant: Intel CorporationInventors: James Dinan, Mario Flajslik, Keith Underwood, David Keppel, Ulf Rainer Hanebutte
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Publication number: 20170185563Abstract: Techniques are disclosed for algorithmic mapping of logical process identifiers in order to provide highly-scalable end-point addressing in multi-node systems capable of performing massively parallel applications. In particular, nodes initiating inter-process communication with a target process may use an initiator-side translation process that performs an algorithmic mapping to translate a logical process identifier (e.g., a rank/processing element) into a target physical node identifier and a target local process identifier. The initiating node may then use hardware fabric of a multi-node network to route the inter-process communication to an appropriate node. A node may receive an inter-process communication and may use a target-side translation process in hardware to translate the target virtual process identifier into a local process identifier for the node.Type: ApplicationFiled: December 24, 2015Publication date: June 29, 2017Applicant: Intel CorporationInventors: Keith Underwood, Charles F. Giefer, David Addison
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Publication number: 20160381120Abstract: This disclosure is directed to a system for event dissemination. In general, a system may comprise a plurality of devices each including an event dissemination module (EDM) configured to disseminate events between the plurality of devices. New events may be generated during the normal course of operation in each of the plurality of devices. These events may be provided to at least one device designated as a network dispatch location. The network dispatch location may initiate the dissemination of the events. For example, each device may place received events into a local event queue within the device. The placement of an event into the local event queue may cause a counter in the EDM to increment. Incrementing the counter may, in turn, cause a trigger operation module in the EDM to perform at least one activity including, for example, forwarding the event to other devices within the plurality of devices.Type: ApplicationFiled: June 24, 2015Publication date: December 29, 2016Applicant: INTEL CORPORATIONInventors: MARIO FLAJSLIK, JAMES DINAN, KEITH UNDERWOOD
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Publication number: 20070160424Abstract: A system and method for restoring wetland habitats and providing a platform on which indigenous and transplanted plant species can thrive. Water from a source, such as, stormwater run-off is captured and filtered through a combination of sand berms and riffle weirs to a series of aquatic beds, thus creating nutrient-rich environment.Type: ApplicationFiled: July 10, 2006Publication date: July 12, 2007Inventor: Keith Underwood
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Patent number: 6550356Abstract: The composite battery-integrated tattooing machine totally avoids a clip cord and the drag associated with it. The new machine comprises a base frame for removably holding a needle bar housing assembly, a tattoo needle assembly removably mounted to reciprocate within the needle bar housing, a reciprocating motion generator having at least one electromagnet and a make and break mechanism for effecting reciprocating motion of the tattoo needle assembly, a battery, a rheostat, and a switch for actuation of the reciprocating motion of the tattoo needle assembly. An important switch arrangement is radio operated; other switches are hand operated. Special subassemblies are provided for conversion of known professional tattooing machines into the new type having battery power integrated with the tattooing machine. Experts can now tattoo without the annoying drag of a clip cord.Type: GrantFiled: September 15, 2000Date of Patent: April 22, 2003Inventor: Keith A. Underwood
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Patent number: D247774Type: GrantFiled: March 22, 1976Date of Patent: April 25, 1978Inventor: Keith A. Underwood