Abstract: Disclosed herein is a symmetric transformer in the context of a DC-DC isolated converter. The symmetric transformer reduces or eliminates asymmetry in the distribution of parasitic capacitance across the isolation barrier going from one end to another end of a primary coil, and as a result, undesirable electromagnetic interference (EMI) due to common mode dipole emission across the isolation barrier may be reduced. In some embodiments, a primary winding is split into separate first and second coils, with a serial impedance connected in between the first and second coils. The transformer is symmetric in the sense that a capacitive coupling of the first coil to a secondary winding is the same as a capacitive coupling of the second coil to the secondary winding, such that common mode EMI may be reduced.

Abstract: Aspects of the present disclosure provide miniaturized isolator modules capable of transferring power and/or data signals across an isolation barrier by way of a transformer while maintaining intrinsic safety (IS) compliance. For example, the isolator modules may provide power from a non-IS side to an IS side of the isolation barrier while protecting the IS side in the event of an overvoltage and/or overcurrent event on the non-IS side. In some aspects, an isolator module includes one or more silicon protection devices, which facilitate the miniaturization of the isolator module while maintaining protection against overvoltage and/or overcurrent events in accordance with IS standards. In some aspects, an isolator module includes a transformer adapted for IS compliance. For example, coils of the transformer may be disposed on opposing sides of an isolation barrier having a thickness of at least 200 microns.

Abstract: A switched power circuit to control a common-mode signal. The switched power circuit includes a first switch and a second switch configured to generate switch mode voltage between a first node and a second node. The switched power circuit further includes a feedback circuit that is configured to detect common-mode voltage generated between the first node and the second node by a first signal generated by the first switch and a second signal generated by the second switch, and incrementally adjust a timing parameter of the first signal to adjust the common-mode signal.

Abstract: Disclosed herein is a symmetric split planar transformer in the context of a DC-DC isolated converter. The symmetric split planar transformer reduces or eliminates asymmetry in the distribution of parasitic capacitance across the isolation barrier going from one end to another end of a primary coil, and as a result, undesirable electromagnetic interference (EMI) due to common mode dipole emission across the isolation barrier may be reduced. In some embodiments, the primary winding is split into at least a first coil and a second coil, each occupying a different area side-by-side on a substrate. The transformer is symmetric in the sense that a capacitive coupling of the first coil to a secondary winding is the same as a capacitive coupling of the second coil to the secondary winding, such that common mode EMI may be reduced. Each coil may include stacked spiral coil portions in multiple metal planes to increase inductive density across the isolation barrier.

Abstract: Disclosed herein is a symmetric transformer in the context of a DC-DC isolated converter. The symmetric transformer reduces or eliminates asymmetry in the distribution of parasitic capacitance across the isolation barrier going from one end to another end of a primary coil, and as a result, undesirable electromagnetic interference (EMI) due to common mode dipole emission across the isolation barrier may be reduced. In some embodiments, a primary winding is split into separate first and second coils, with a serial impedance connected in between the first and second coils. The transformer is symmetric in the sense that a capacitive coupling of the first coil to a secondary winding is the same as a capacitive coupling of the second coil to the secondary winding, such that common mode EMI may be reduced.

Abstract: Disclosed herein is a symmetric split planar transformer in the context of a DC-DC isolated converter. The symmetric split planar transformer reduces or eliminates asymmetry in the distribution of parasitic capacitance across the isolation barrier going from one end to another end of a primary coil, and as a result, undesirable electromagnetic interference (EMI) due to common mode dipole emission across the isolation barrier may be reduced. In some embodiments, the primary winding is split into at least a first coil and a second coil, each occupying a different area side-by-side on a substrate. The transformer is symmetric in the sense that a capacitive coupling of the first coil to a secondary winding is the same as a capacitive coupling of the second coil to the secondary winding, such that common mode EMI may be reduced. Each coil may include stacked spiral coil portions in multiple metal planes to increase inductive density across the isolation barrier.

Abstract: Aspects of the present disclosure provide miniaturized isolator modules capable of transferring power and/or data signals across an isolation barrier by way of a transformer while maintaining intrinsic safety (IS) compliance. For example, the isolator modules may provide power from a non-IS side to an IS side of the isolation barrier while protecting the IS side in the event of an overvoltage and/or overcurrent event on the non-IS side. In some aspects, an isolator module includes one or more silicon protection devices, which facilitate the miniaturization of the isolator module while maintaining protection against overvoltage and/or overcurrent events in accordance with IS standards. In some aspects, an isolator module includes a transformer adapted for IS compliance. For example, coils of the transformer may be disposed on opposing sides of an isolation barrier having a thickness of at least 200 microns.

Abstract: A switched power circuit to control a common-mode signal. The switched power circuit includes a first switch and a second switch configured to generate switch mode voltage between a first node and a second node. The switched power circuit further includes a feedback circuit that is configured to detect common-mode voltage generated between the first node and the second node by a first signal generated by the first switch and a second signal generated by the second switch, and incrementally adjust a timing parameter of the first signal to adjust the common-mode signal.