Patents by Inventor Keizou Sakurai

Keizou Sakurai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10965013
    Abstract: An antenna module of the present disclosure includes a control substrate having a flat plate shape and configured to house or mount a semiconductor element; a frame substrate bonded to an upper surface of the control substrate via bonding members and exposing a center portion of the upper surface of the control substrate; and an antenna substrate having a flat plate shape, bonded to an upper surface of the frame substrate via the bonding members so as to face the control substrate, and provided with a plurality of antenna patterns disposed along a main surface of the antenna substrate. The frame substrate includes a frame main body and a crosspiece. Between the frame main body/the crosspiece and the control substrate as well as the antenna substrate, projecting portions that come into contact with the opposing control substrate, frame substrate, and antenna substrate are provided at a fixed height.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: March 30, 2021
    Assignee: Kyocera Corporation
    Inventor: Keizou Sakurai
  • Publication number: 20210014960
    Abstract: A wiring substrate comprises a first substrate, a second substrate which includes a frame body located on the outer circumferential edge of the first substrate, at least two connecting parts connected to the inner circumferential part of the frame body, and a support body connecting the two connecting parts to each other, and a third substrate located on a surface of the second substrate opposite the first substrate. The support body includes a direction changing part between the two connecting parts and does not include an annular structure where the direction changing part is included on the circumference.
    Type: Application
    Filed: January 24, 2019
    Publication date: January 14, 2021
    Applicant: KYOCERA Corporation
    Inventor: Keizou SAKURAI
  • Patent number: 10868368
    Abstract: An antenna substrate includes a cap substrate including first antenna conductors arranged lengthwise and crosswise on a first insulating layer facing each other, and a first connection pad on the outer peripheral edge of the first insulating layer's lower surface; a frame substrate including a second connection pad on an outer peripheral edge of a second insulating layer's upper surface and a third connection pad on an outer peripheral edge of the second insulating layer's lower surface; and a base substrate including a plurality of second antenna conductors arranged on a third insulating layer's upper surface and a fourth connection pad on an outer peripheral edge of the third insulating layer's upper surface. The base, frame and cap substrates are layered in this order. First opening portions in the second insulating layer have an outer periphery located radially outward from the first antenna conductor's outer periphery in a top view.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: December 15, 2020
    Assignee: KYOCERA CORPORATION
    Inventor: Keizou Sakurai
  • Patent number: 10854979
    Abstract: An antenna substrate includes a cap substrate including a first antenna conductor located on upper and lower surfaces of a first insulating layer; a frame substrate including an opening located in the second insulating layer and having an outer periphery that surrounds an individual of or a collective number of outer peripheries of the plurality of first antenna conductors in a top view; a base substrate including a second antenna conductor located on an upper surface of a third insulating layer; a first adhesive material adhering the first insulating layer and the second insulating layer; and a second adhesive material adhering the second insulating layer and the third insulating layer; and the first adhesive material and the second adhesive material include a first bonding member and a second bonding member having an adhesive strength to the second insulating layer greater than that of the first bonding member.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: December 1, 2020
    Assignee: Kyocera Corporation
    Inventor: Keizou Sakurai
  • Publication number: 20190334231
    Abstract: An antenna module of the present disclosure includes a control substrate having a flat plate shape and configured to house or mount a semiconductor element; a frame substrate bonded to an upper surface of the control substrate via bonding members and exposing a center portion of the upper surface of the control substrate; and an antenna substrate having a flat plate shape, bonded to an upper surface of the frame substrate via the bonding members so as to face the control substrate, and provided with a plurality of antenna patterns disposed along a main surface of the antenna substrate. The frame substrate includes a frame main body and a crosspiece. Between the frame main body/the crosspiece and the control substrate as well as the antenna substrate, projecting portions that come into contact with the opposing control substrate, frame substrate, and antenna substrate are provided at a fixed height.
    Type: Application
    Filed: November 30, 2017
    Publication date: October 31, 2019
    Applicant: KYOCERA Corporation
    Inventor: Keizou SAKURAI
  • Publication number: 20190319350
    Abstract: An antenna substrate includes a cap substrate including first antenna conductors arranged lengthwise and crosswise on a first insulating layer facing each other, and a first connection pad on the outer peripheral edge of the first insulating layer's lower surface; a frame substrate including a second connection pad on an outer peripheral edge of a second insulating layer's upper surface and a third connection pad on an outer peripheral edge of the second insulating layer's lower surface; and a base substrate including a plurality of second antenna conductors arranged on a third insulating layer's upper surface and a fourth connection pad on an outer peripheral edge of the third insulating layer's upper surface. The base, frame and cap substrates are layered in this order. First opening portions in the second insulating layer have an outer periphery located radially outward from the first antenna conductor's outer periphery in a top view.
    Type: Application
    Filed: December 8, 2017
    Publication date: October 17, 2019
    Applicant: KYOCERA Corporation
    Inventor: Keizou SAKURAI
  • Publication number: 20190312331
    Abstract: An antenna substrate includes a cap substrate including a first antenna conductor located on upper and lower surfaces of a first insulating layer; a frame substrate including an opening located in the second insulating layer and having an outer periphery that surrounds an individual of or a collective number of outer peripheries of the plurality of first antenna conductors in a top view; a base substrate including a second antenna conductor located on an upper surface of a third insulating layer; a first adhesive material adhering the first insulating layer and the second insulating layer; and a second adhesive material adhering the second insulating layer and the third insulating layer; and the first adhesive material and the second adhesive material include a first bonding member and a second bonding member having an adhesive strength to the second insulating layer greater than that of the first bonding member.
    Type: Application
    Filed: December 11, 2017
    Publication date: October 10, 2019
    Applicant: KYOCERA Corporation
    Inventor: Keizou SAKURAI
  • Patent number: 9761518
    Abstract: A method of manufacturing a cavity substrate of the present invention includes respectively laminating second and third substrates on upper and lower surfaces of a first substrate having an opening and having an external dimension larger than an external dimension of each of the second and third substrates to ensure that an end portion of the first substrate protrudes a first length from the second and third substrates, and cutting the end portion of the first substrate protruding from each of the second and third substrates to a second length smaller than the first length.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: September 12, 2017
    Assignee: Kyocera Corporation
    Inventor: Keizou Sakurai
  • Publication number: 20160247753
    Abstract: A method of manufacturing a cavity substrate of the present invention includes respectively laminating second and third substrates on upper and lower surfaces of a first substrate having an opening and having an external dimension larger than an external dimension of each of the second and third substrates to ensure that an end portion of the first substrate protrudes a first length from the second and third substrates, and cutting the end portion of the first substrate protruding from each of the second and third substrates to a second length smaller than the first length.
    Type: Application
    Filed: February 19, 2016
    Publication date: August 25, 2016
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventor: Keizou SAKURAI
  • Publication number: 20160095218
    Abstract: A composite wiring board includes a first wiring board having an opening for housing an electronic component, and including a plurality of first connection pads on an upper surface and a plurality of second connection pads on a lower surface, and a second wiring board having the electronic component mounted on a lower surface, including a third connection pad provided on the lower surface on an outer peripheral side and bonded to the first connection pad through a solder, and disposed on the first wiring board so as to cover the opening, in which a grounding inner wall conductor layer is deposited on an inner wall of the opening around the electronic component, and a grounding conductor layer is deposited on the lower surface of the second wiring board and connected to the inner wall conductor layer through a solder.
    Type: Application
    Filed: September 18, 2015
    Publication date: March 31, 2016
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventor: Keizou SAKURAI
  • Patent number: 9282642
    Abstract: A wiring board includes a base wiring board 10 and a frame wiring board 20. The base wiring board 10 has an element mounting portion 1a and a frame-shaped frame joining portion 1b on the upper surface and a solder resist layer 4 deposited in a portion between the element mounting portion 1a and the frame joining portion 1b. In the wiring board 10, a first joining pad 6 provided in the frame joining portion 1b and a second joining pad 16 provided in a lower surface of the frame wiring board 20 are joined together via a solder bump H so that a gap may be formed between the frame joining portion 1b and the frame wiring board 20. The base wiring board 10 has a resin injection hole 8 penetrating through the base wiring board 10 in the frame joining portion 1b, and the gap is filled with a sealing resin 18.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: March 8, 2016
    Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventor: Keizou Sakurai
  • Patent number: 9173299
    Abstract: There is provided a collective printed circuit board including a plurality of printed circuit boards each having a mounting unit on which a semiconductor element is mounted at an upper-surface central portion, and a frame having a plurality of through holes having sizes to surround the mounting portion. Upper-surface peripheral edge portions of the printed circuit boards and a through-hole peripheral portion of the frame are bonded to each other such that the mounting units are exposed from the through holes.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: October 27, 2015
    Assignee: KYOCERA CIRCUIT SOLUTIONS, INC.
    Inventors: Keizou Sakurai, Toshiaki Takagi
  • Patent number: 8698007
    Abstract: There is provided a printed circuit board including an insulating substrate having a guide hole, a solder resist layer coated on a surface of the insulating substrate, and a connection pad arranged on the surface of the insulating substrate and having an outer periphery covered with the solder resist layer and a central portion exposed in an opening formed in the solder resist layer. The solder resist layer has a positioning hole having a diameter smaller than that of the guide hole and formed by photolithography above the guide hole simultaneously with the opening.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: April 15, 2014
    Assignee: Kyocera SLC Technologies Corporation
    Inventor: Keizou Sakurai
  • Publication number: 20140092569
    Abstract: A wiring board includes a base wiring board 10 and a frame wiring board 20. The base wiring board 10 has an element mounting portion 1a and a frame-shaped frame joining portion 1b on the upper surface and a solder resist layer 4 deposited in a portion between the element mounting portion 1a and the frame joining portion 1b. In the wiring board 10, a first joining pad 6 provided in the frame joining portion 1b and a second joining pad 16 provided in a lower surface of the frame wiring board 20 are joined together via a solder bump H so that a gap may be formed between the frame joining portion 1b and the frame wiring board 20. The base wiring board 10 has a resin injection hole 8 penetrating through the base wiring board 10 in the frame joining portion 1b, and the gap is filled with a sealing resin 18.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 3, 2014
    Applicant: KYOCERA SLC Technologies Corporation
    Inventor: Keizou SAKURAI
  • Publication number: 20120081864
    Abstract: There is provided a collective printed circuit board including a plurality of printed circuit boards each having a mounting unit on which a semiconductor element is mounted at an upper-surface central portion, and a frame having a plurality of through holes having sizes to surround the mounting portion. Upper-surface peripheral edge portions of the printed circuit boards and a through-hole peripheral portion of the frame are bonded to each other such that the mounting units are exposed from the through holes.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 5, 2012
    Applicant: KYOCERA SLC TECHNOLOGIES CORPORATION
    Inventors: Keizou SAKURAI, Toshiaki TAKAGI
  • Publication number: 20120080223
    Abstract: There is provided a printed circuit board including an insulating substrate having a guide hole, a solder resist layer coated on a surface of the insulating substrate, and a connection pad arranged on the surface of the insulating substrate and having an outer periphery covered with the solder resist layer and a central portion exposed in an opening formed in the solder resist layer. The solder resist layer has a positioning hole having a diameter smaller than that of the guide hole and formed by photolithography above the guide hole simultaneously with the opening.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 5, 2012
    Applicant: KYOCERA SLC TECHNOLOGIES CORPORATION
    Inventor: Keizou SAKURAI
  • Patent number: 4575602
    Abstract: There is disclosed an improved apparatus for forming a bonding ball on a tip end of the bonding wire. There are provided a capillary member having a through-hole for holding and guiding the bonding wire, and a cylindrical member having an inner diameter larger than the outer diameter of said capillary member and located in a substantially coaxial relation to the capillary member. The cylindrical member is adapted to be reciprocated in the same direction as that of movement of the capillary member but at a velocity slower than the moving velocity of said capillary member. Further, the cylindrical member is ceaselessly supplied with an inert gas.
    Type: Grant
    Filed: April 24, 1985
    Date of Patent: March 11, 1986
    Assignee: NEC Corporation
    Inventor: Keizou Sakurai