Patents by Inventor Kelly J. Marquardt
Kelly J. Marquardt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8126674Abstract: A memory daughter card (MDC) is described, having a very high-speed serial interface and an on-card MDC test engine that allows one MDC to be directly connected to another MDC for testing purposes. In some embodiments, a control interface allows the test engine to be programmed and controlled by a test controller on a test fixture that allows simultaneous testing of a single MDC or one or more pairs of MDCs, one MDC in a pair (e.g., the “golden” MDC) testing the other MDC of that pair. Other methods are also described, wherein one MDC executes a series of reads and writes and other commands to another MDC to test at least some of the other card's functions, or wherein one port executes a series of test commands to another port on the same MDC to test at least some of the card's functions.Type: GrantFiled: August 27, 2010Date of Patent: February 28, 2012Assignee: Cray Inc.Inventors: David R. Resnick, Gerald A. Schwoerer, Kelly J. Marquardt, Alan M. Grossmeier, Michael L. Steinberger, Van L. Snyder, Roger A. Bethard
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Publication number: 20100324854Abstract: A memory daughter card (MDC) is described, having a very high-speed serial interface and an on-card MDC test engine that allows one MDC to be directly connected to another MDC for testing purposes. In some embodiments, a control interface allows the test engine to be programmed and controlled by a test controller on a test fixture that allows simultaneous testing of a single MDC or one or more pairs of MDCs, one MDC in a pair (e.g., the “golden” MDC) testing the other MDC of that pair. Other methods are also described, wherein one MDC executes a series of reads and writes and other commands to another MDC to test at least some of the other card's functions, or wherein one port executes a series of test commands to another port on the same MDC to test at least some of the card's functions.Type: ApplicationFiled: August 27, 2010Publication date: December 23, 2010Applicant: CRAY INC.Inventors: David R. Resnick, Gerald A. Schwoerer, Kelly J. Marquardt, Alan M. Grossmeier, Michael L. Steinberger, Van L. Snyder, Roger A. Bethard
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Patent number: 7826996Abstract: A memory daughter card (MDC) is described, having a very high-speed serial interface and an on-card MDC test engine that allows one MDC to be directly connected to another MDC for testing purposes. In some embodiments, a control interface allows the test engine to be programmed and controlled by a test controller on a test fixture that allows simultaneous testing of a single MDC or one or more pairs of MDCs, one MDC in a pair (e.g., the “golden” MDC) testing the other MDC of that pair. Other methods are also described, wherein one MDC executes a series of reads and writes and other commands to another MDC to test at least some of the other card's functions, or wherein one port executes a series of test commands to another port on the same MDC to test at least some of the card's functions.Type: GrantFiled: February 26, 2007Date of Patent: November 2, 2010Assignee: Cray Inc.Inventors: David R. Resnick, Gerald A. Schwoerer, Kelly J. Marquardt, Alan M. Grossmeier, Michael L. Steinberger, Van L. Snyder, Roger A. Bethard
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Patent number: 7676728Abstract: A memory controller and method that provide a read-refresh (also called “distributed-refresh”) mode of operation, in which every row of memory is read within the refresh-rate requirements of the memory parts, with data from different columns within the rows being read on subsequent read-refresh cycles until all rows for each and every column address have been read, scrubbing errors if found, thus providing a scrubbing function that is integrated into the read-refresh operation, rather than being an independent operation. For scrubbing, an atomic read-correct-write operation is scheduled. A variable-priority, variable-timing refresh interval is described. An integrated card self-tester and/or card reciprocal-tester is described. A memory bit-swapping-within-address-range circuit, and a method and apparatus for bit swapping on the fly and testing are described.Type: GrantFiled: November 10, 2006Date of Patent: March 9, 2010Assignee: Cray Inc.Inventors: David R. Resnick, Van L. Snyder, Michael F. Higgins, Alan M. Grossmeier, Kelly J. Marquardt, Gerald A. Schwoerer
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Patent number: 7320100Abstract: A memory controller and method that provide a read-refresh (also called “distributed-refresh”) mode of operation, in which every row of memory is read within the refresh-rate requirements of the memory parts, with data from different columns within the rows being read on subsequent read-refresh cycles until all rows for each and every column address have been read, scrubbing errors if found, thus providing a scrubbing function that is integrated into the read-refresh operation, rather than being an independent operation. For scrubbing, an atomic read-correct-write operation is scheduled. A variable-priority, variable-timing refresh interval is described. An integrated card self-tester and/or card reciprocal-tester is described. A memory bit-swapping-within-address-range circuit, and a method and apparatus for bit swapping on the fly and testing are described.Type: GrantFiled: May 19, 2004Date of Patent: January 15, 2008Assignee: Cray Inc.Inventors: R. Paul Dixon, David R. Resnick, Gerald A. Schwoerer, Kelly J. Marquardt, Alan M. Grossmeier, Michael L. Steinberger, Van L. Snyder, Roger A. Bethard, Michael F. Higgins
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Patent number: 7184916Abstract: A memory daughter card (MDC) is described, having a very high-speed serial interface and an on-card MDC test engine that allows one MDC to be directly connected to another MDC for testing purposes. In some embodiments, a control interface allows the test engine to be programmed and controlled by a test controller on a test fixture that allows simultaneous testing of a single MDC or one or more pairs of MDCs, one MDC in a pair (e.g., the “golden” MDC) testing the other MDC of that pair. Other methods are also described, wherein one MDC executes a series of reads and writes and other commands to another MDC to test at least some of the other card's functions, or wherein one port executes a series of test commands to another port on the same MDC to test at least some of the card's functions.Type: GrantFiled: May 19, 2004Date of Patent: February 27, 2007Assignee: Cray Inc.Inventors: David R. Resnick, Gerald A. Schwoerer, Kelly J. Marquardt, Alan M. Grossmeier, Michael L. Steinberger, Van L. Snyder, Roger A. Bethard
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Publication number: 20040267481Abstract: A memory daughter card (MDC) is described, having a very high-speed serial interface and an on-card MDC test engine that allows one MDC to be directly connected to another MDC for testing purposes. In some embodiments, a control interface allows the test engine to be programmed and controlled by a test controller on a test fixture that allows simultaneous testing of a single MDC or one or more pairs of MDCs, one MDC in a pair (e.g., the “golden” MDC) testing the other MDC of that pair. Other methods are also described, wherein one MDC executes a series of reads and writes and other commands to another MDC to test at least some of the other card's functions, or wherein one port executes a series of test commands to another port on the same MDC to test at least some of the card's functions.Type: ApplicationFiled: May 19, 2004Publication date: December 30, 2004Inventors: David R. Resnick, Gerald A. Schwoerer, Kelly J. Marquardt, Alan M. Grossmeier, Michael L. Steinberger, Van L. Snyder, Roger A. Bethard