Abstract: A field programmable gate array (FPGA) and methods for executing operations using an FPGA are provided. The method includes providing a first dynamic macro and a second dynamic macro in the FPGA. The first dynamic macro and the second dynamic macro each represent logic within the FPGA that can be reconfigured. The method further includes executing a first operation associated with the user application using the first dynamic macro; reconfiguring the second macro to execute a second operation associated with the user application prior to completion of the first operation; and upon completion of the first operation, executing the second operation using the second dynamic macro.