Patents by Inventor Kemal Aygun

Kemal Aygun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PRINTED CIRCUIT ASSEMBLY AND METHOD FOR MEASURING CHARACTERISTIC IMPEDANCE
    Publication number: 20090322350
    Abstract: A printed circuit assembly is provided. The printed circuit assembly includes a plurality of signal layers and a plurality of test structures disposed within the plurality of signal layers, wherein each of the plurality of test structures comprises one of a microstrip and a stripline and wherein each of the plurality of test structures is to measure a characteristic impedance of each of the plurality of signal layers.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventors: Kemal Aygun, Jaemin Shin
  • PACKAGE EMBEDDED EQUALIZER
    Publication number: 20080238587
    Abstract: A passive equalizer circuit is embedded within a substrate of a package containing an integrated circuit. It is believed that substantial reduction in uneven frequency dependent loss may be achieved for interconnects interconnecting the integrated circuit with other integrated circuits on a printed circuit board. Other aspects are described and claimed.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Jaemin Shin, Pascal A. Meier, Telesphor Kamgaing, Kemal Aygun
  • Controlled equivalent series resistance capacitor
    Patent number: 7361969
    Abstract: Some embodiments of the present invention include capacitors with controlled equivalent series resistance.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: April 22, 2008
    Assignee: Intel Corporation
    Inventors: Michael J. Hill, Kemal Aygun, Kimberly D. Eilert, Kaladhar Radhakrishnan
  • Package using array capacitor core
    Publication number: 20070134925
    Abstract: An embodiment of the present invention is a technique to fabricate a package substrate. The package substrate includes top substrate layers, an array capacitor, and bottom substrate layers. The top substrate layers embed micro-vias. The micro-vias have a micro-via area and provide electrical connections between the top substrate layers. The array capacitor structure is placed in contact with the micro-via area. The array capacitor structure is electrically connected to the micro-vias. The bottom substrate layers are formed on the array capacitor structure.
    Type: Application
    Filed: December 12, 2005
    Publication date: June 14, 2007
    Inventors: Kimberly Eilert, Kaladhar Radhakrishnan, Kemal Aygun, Michael Hill
  • Controlled equivalent series resistance capacitor
    Publication number: 20070007573
    Abstract: Some embodiments of the present invention include capacitors with controlled equivalent series resistance.
    Type: Application
    Filed: July 8, 2005
    Publication date: January 11, 2007
    Inventors: Michael Hill, Kemal Aygun, Kimberly Eilert, Kaladhar Radhakrishnan