Abstract: This application relates to methods and apparatus for power limiting for amplifiers. An amplifier is configured to receive an input supply voltage and to draw, in use, an amplifier input current resulting in an amplifier input power. A power limiter is configured to monitor an indication of the amplifier input power, determine a first signal limit based on said indication of the amplifier input power and a pre-set limit and apply regulation to the input signal to provide a regulated input signal for input to the amplifier that does not exceed the first signal limit.

Abstract: An audio processing system reduces perception of audible artifacts due to changes in an element in an audio channel of the audio processing system. The system reproduces an audio input signal and produces an audio output signal with the audio channel. The channel has an adjustable or selectable element that, responsive to a control signal, changes a characteristic of the audio processing channel, which generates a transient in the audio output signal. The systems include a level detector for measuring a signal level of the audio input signal and a controller responsive to an output of the level detector to determine a masking time interval available from the audio output signal due to signal content in the audio input signal. The controller generates the control signal to change the characteristic of the audio processing channel so that at least a portion of the transient occurs in the masking time interval.

Abstract: In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.

Abstract: In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.

Abstract: A circuit includes a first amplifier configured to amplify an input signal to generate an output signal. An offset sensor is configured to sense DC offset based on the output signal, where the offset sensor includes a second amplifier configured to generate an offset reduction signal for the first amplifier based on the sensed DC offset. A T-network in the circuit includes at least three resistors coupled to provide a feedback connection between the input signal and the output signal for the first amplifier and to receive the offset reduction signal to mitigate DC offset in the first amplifier. Since this method reduces the low-frequency component of the signal, it also shapes and reduces the flicker noise.

Abstract: A circuit includes a first amplifier configured to amplify an input signal to generate an output signal. An offset sensor is configured to sense DC offset based on the output signal, where the offset sensor includes a second amplifier configured to generate an offset reduction signal for the first amplifier based on the sensed DC offset. A T-network in the circuit includes at least three resistors coupled to provide a feedback connection between the input signal and the output signal for the first amplifier and to receive the offset reduction signal to mitigate DC offset in the first amplifier. Since this method reduces the low-frequency component of the signal, it also shapes and reduces the flicker noise.

Abstract: Active resistive circuitry (10, 10A, 11, 11A 25, 30, 35, or 40) includes a first current divider circuit (11) having an input (15) coupled to a first signal (Vi). The first current divider circuit (11) includes a first amplifier (13) having a first input (?) coupled to the first signal (Vi). A symmetrically bilateral first bidirectional circuit (M1a,M1b; R1) is coupled between the first input (?) of the first amplifier (13) and an output (17) of the first amplifier (13), and functions as a feedback circuit of the first amplifier (13). A symmetrically bilateral second bidirectional circuit (M2a,M2b; R2) is coupled between the output (17) of the first amplifier (13) and an output (18) of the first current divider circuit (11).