Abstract: Filter system embodiments are provided for realizing interpolation and decimation processes with interleaved filter structures. These interleaved structures enable the systems to obtain output data rates that exceed the highest operation rates of the system components.

Abstract: Filter system embodiments are provided for realizing interpolation and decimation processes with interleaved filter structures. These interleaved structures enable the systems to obtain output data rates that exceed the highest operation rates of the system components.

Abstract: Universal signal modulators structures are shown which are particularly useful for selectively generating polar-modulated digital sequences from input phase and amplitude symbols and for generating quadrature-modulated digital sequences from input first and second quadrature symbols. Significantly, the modulation structure (quadrature modulation or polar modulation) of these embodiments can selected by simply changing the state of a mode command.

Abstract: Universal signal modulators structures are shown which are particularly useful for selectively generating polar-modulated digital sequences from input phase and amplitude symbols and for generating quadrature-modulated digital sequences from input first and second quadrature symbols. Significantly, the modulation structure (quadrature modulation or polar modulation) of these embodiments can selected by simply changing the state of a mode command.

Abstract: Signal generators are realized with combinations of a digital synthesizer (e.g., direct digital synthesizer), a frequency controller and a phase controller. The frequency controller receives a user-provided minimum count of a reference frequency wherein the minimum count is chosen to initially position a synthesizer signal within a selected frequency error of the reference frequency. In response, the frequency controller runs counters over a time sufficient to obtain the minimum count. The frequency controller then uses a difference count between the counts of the reference frequency and the synthesizer frequency to determine a controlled tuning word that properly positions the synthesizer signal. Subsequently, the phase controller detects phase differences between the reference signal and the synthesizer signal and applies phase correction signals to control the phase of the synthesizer signal.

Abstract: Synthesizers are provided to generate synthesizer signals in response to primary digital signal representations that are created by a signal generator. In an important feature, the synthesizers further include a signal corrector that inserts correction digital signal representations to at least partially cancel a corresponding spurious component in the primary digital signal representation and thereby provide synthesizer signals with reduced spurious content.

Abstract: Digital filters are provided that include a converter and a data processor. The converter converts successive strings of M successive data elements that occur at a system rate Fs in an input data stream Din to M parallel data elements that respectively occur at a substream rate Fs/M in M data substreams Dsbstrm. At a reduced substream rate Fs/M, the processor generates M convolutions of the filter's quantized impulse response with the M data substreams wherein each of the convolutions is arranged to generate a different one of M successive filtered output signals. Because the convolutions are conducted at the reduced substream rate Fs/M, the filters can operate at increased system rates. Preferably, the digital filter also includes a multiplexer that selects, at the system rate Fs, the M filtered output signals in successive order to thereby form a filtered output data stream Dout.

Abstract: In order to generate a carrier frequency Fc, a digital modulator must operate (to satisfy the Nyquist criteria) at a system sample rate Rs which is at least twice the carrier frequency Fc. However, digital modulator structures are provided herein that facilitate the use of M quadrature modulators which modulate, at a reduced modulation rate Rs/M, respective ones of M polyphase cosine elements and M polyphase sine elements with respective ones of interpolated I elements and interpolated Q elements to thereby form M polyphase modulated elements. The modulated elements are then sequentially selected in a multiplexer to form a modulated digital signal. The reduced modulation rate simplifies modulator design and lowers fabrication costs.

Abstract: Direct digital synthesis (DDS) methods and structures are provided that increase DDS output frequencies fout without requiring a corresponding increase in the rate fclk at which DDS structures must operate. An exemplary method generates a periodic stream of digital words at a clock frequency fclk wherein the words represent respective amplitudes of a predetermined periodic waveform, the periodic stream has a period P and the digital words are spaced by a phase step &phgr;s.

Abstract: In a circuit tester for applying test voltage to circuit components, a voltage monitor for detecting potentially destructive voltages being applied to one or more additional circuit components other than the components being tested, and in response generating an alarm signal for interrupting the circuit tester, thereby inhibiting generation of the destructive voltages. Monitored input voltages are compared to selectable positive and negative threshold voltages defining upper and lower polarity sensitive destructive voltage limits.