Patents by Inventor Ken INADUMI

Ken INADUMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8779523
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate with a p-type conductivity, a buried layer with an n-type conductivity provided on the semiconductor substrate, a back gate layer with a p-type conductivity provided on the buried layer, a drain layer with an n-type conductivity provided on the back gate layer, a source layer with an n-type conductivity provided spaced from the drain layer, a gate electrode provided in a region immediately above a portion of the back gate layer between the drain layer and the source layer, and a drain electrode in contact with a part of an upper surface of the drain layer. A thickness of the drain layer in a region immediately below a contact surface between the drain layer and the drain electrode is half a total thickness of the back gate and drain layers in the region.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: July 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Shirai, Ken Inadumi, Tsuyoshi Hirayu, Toshihiro Sakamoto
  • Publication number: 20130181296
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate with a p-type conductivity, a buried layer with an n-type conductivity provided on the semiconductor substrate, a back gate layer with a p-type conductivity provided on the buried layer, a drain layer with an n-type conductivity provided on the back gate layer, a source layer with an n-type conductivity provided spaced from the drain layer, a gate electrode provided in a region immediately above a portion of the back gate layer between the drain layer and the source layer, and a drain electrode in contact with a part of an upper surface of the drain layer. A thickness of the drain layer in a region immediately below a contact surface between the drain layer and the drain electrode is half a total thickness of the back gate and drain layers in the region.
    Type: Application
    Filed: June 8, 2012
    Publication date: July 18, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koji SHIRAI, Ken INADUMI, Tsuyoshi HIRAYU, Toshihiro SAKAMOTO