Abstract: There is provided a shooting control apparatus, a shooting control method for controlling operations of a shooting part mounted on a mobile object such as automobile, and a shooting apparatus mounted on a mobile object for use. A center region includes fine pixels, for high-resolution shooting. On the other hand, peripheral regions includes large-size pixels or are at a high sensitivity by pixel addition, thereby reducing blur or focal plane distortion by shortening the exposure time when fast driving or shooting a moving object. Further, while traveling during the nighttime or in a dark place, the peripheral regions not irradiated by the headlamps can be shot in a long exposure time and at a sufficient sensitivity.

Abstract: To provide a shooting control apparatus and a shooting control method for controlling operations of a shooting part mounted on a mobile object such as automobile, as well as a shooting apparatus mounted on a mobile object for use. A center region 801 is configured of fine pixels, thereby realizing high-resolution shooting. On the other hand, peripheral regions 802 and 803 are configured of large-size pixels or are at a high sensitivity by pixel addition, thereby reducing blur or focal plane distortion by shortening the exposure time when fast driving or shooting a moving object. Further, while traveling during the nighttime or in a dark place, the peripheral regions 802 and 803 not irradiated by the headlamps can be shot in a long exposure time and at a sufficient sensitivity.

Abstract: An image processing apparatus circuitry receives first image data from a first image capture device of an area adjacent to an automobile and also receives second image data from a second image capture device of the adjacent area. The circuitry combines the first image data with the second image data to form composite image data of a junction region of the at least a portion of the adjacent area. The circuitry changes over time respective image areas taken from the first image capture device and second image capture device to form the composite image data of the junction region.

Abstract: An image processing apparatus circuitry receives first image data from a first image capture device of an area adjacent to an automobile and also receives second image data from a second image capture device of the adjacent area. The circuitry combines the first image data with the second image data to form composite image data of a junction region of the at least a portion of the adjacent area. The circuitry changes over time respective image areas taken from the first image capture device and second image capture device to form the composite image data of the junction region.

Abstract: An image processing apparatus includes a plurality of video processors, a video memory for recording video data, and a plurality of ports. Each of the ports is connected between the video processor and the video memory, for accessing the video memory in response to supplied information. A plurality of memory map table units, each includes at least one table for being set with management information for managing a memory area of the video memory in which video data is recorded, for selectively supplying the management information set to the table to corresponding ports. A processing unit has a function of setting the management information to the table of the memory map table unit.

Abstract: An information processing apparatus includes a memory configured such that structural data areas holding therein structural data, each being constituted by a plurality of pieces of element data, are allocated to a plurality of memory banks, an address area detecting unit configured to detect whether an address value used to access the memory is included in a specific address area including an address used to access the plurality of pieces of element data and an address converting unit configured to convert the address value to an address value for the structural data area in the case that it has been detected that the address value is included in the specific address area.

Abstract: An information processing apparatus includes a memory configured such that structural data areas holding therein structural data, each being constituted by a plurality of pieces of element data, are allocated to a plurality of memory banks, an address area detecting unit configured to detect whether an address value used to access the memory is included in a specific address area including an address used to access the plurality of pieces of element data and an address converting unit configured to convert the address value to an address value for the structural data area in the case that it has been detected that the address value is included in the specific address area.

Abstract: An image processing apparatus includes a plurality of video processors, a video memory for recording video data, a plurality of ports, each connected between the video processor and the video memory, for accessing the video memory in response to supplied information, a plurality of memory map table units, each including at least one table for being set with management information for managing a memory area of the video memory in which video data is recorded, for selectively supplying the management information set to the table to a corresponding ports, and a processing unit having a function of setting the management information to the table of the memory map table unit.

Abstract: In the data driven computer system (FIG. 4, FIG. 7), data are transferred between data driven computers (1, 11, 12, 21, 22, 24, 25, . . . , and n), with instruction code (code) and identification numbers to identify data for arithmetic operation. Calculation results obtained by arithmetic units (111, 121, 21n, 22n, 24n, 25n, . . . , and nn) are stored in a data field (data). In parallel, an instruction rewriting units (3, 115, 125, 134, 211, 221, 241, 251, . . . , and nl) calculates an instruction code to be used in a following process and then rewrite a current instruction code with the calculated one without any execution of a microprocessor (14) or other controller. The result of the arithmetic operation is transferred to a peripheral device (16) or the microprocessor (14) through the data driven computer (13, 23).

Abstract: An information processing device has a plurality of processors each having a register file formed on a single semiconductor chip. A virtual register in one processor and an extension register in the other processor are connected directly through an exclusive data transfer bus to directly execute data read/write operations between these virtual and extension registers. For example, each virtual register and extension register has a 32 bit width and data transfers between these registers are performed in parallel. These fixed connection wires directly connected between these registers are formed during fabrication processes.