Patents by Inventor Ken Nakata

Ken Nakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210111278
    Abstract: A high electron mobility transistor (HEMT) made of primarily nitride semiconductor materials is disclosed. The HEMT, which is a type of reverse HEMT, includes, on a C-polar surface of a SiC substrate, a barrier layer and a channel layer each having N-polar surfaces in respective top surfaces thereof. The HEMT further includes an intermediate layer highly doped with impurities and a Schottky barrier layer on the channel layer. The Schottky barrier layer and a portion of the intermediate layer are removed in portions beneath non-rectifying electrodes but a gate electrode is provided on the Schottky barrier layer.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 15, 2021
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Ken NAKATA
  • Patent number: 10971614
    Abstract: A high electron mobility transistor (HEMT) made of primarily nitride semiconductor materials is disclosed. The HEMT, which is a type of reverse HEMT, includes, on a C-polar surface of a SiC substrate, a barrier layer and a channel layer each having N-polar surfaces in respective top surfaces thereof. The HEMT further includes an intermediate layer highly doped with impurities and a Schottky barrier layer on the channel layer. The Schottky barrier layer and a portion of the intermediate layer are removed in portions beneath non-rectifying electrodes but a gate electrode is provided on the Schottky barrier layer.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: April 6, 2021
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Ken Nakata
  • Patent number: 10943999
    Abstract: A process of forming a field transistor (FET) and a FET are disclosed. The FET includes a nitride semiconductor stack on a substrate. A pair of n+-regions made of oxide semiconductor material are provided within respective recesses in the semiconductor stack. Protecting layers, each made of oxide material, cover peripheries of the n+-regions. Electrodes are provided in openings in the protecting layers to be in direct contact with the n+-regions.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: March 9, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ken Nakata
  • Publication number: 20210038763
    Abstract: Provided is a collagen sponge which has compressive strength (stress) equivalent to that of a tissue into which the collagen sponge is to be implanted, has no unevenness in structure and stress, and has a pore structure for allowing cells to infiltrate thereinto. The collagen sponge is obtained by subjecting a collagen dispersion, a collagen solution, or a mixture thereof having a collagen concentration of 50 mg/ml or more to freeze-drying and insolubilization treatment thereafter. The collagen sponge thus obtained has a stress of from 10 kPa to 30 kPa when loaded with 10% strain, has in its surface and inside a pore structure having a mean pore diameter ranging from 50 ?m to 400 ?m, and has a pore diameter standard deviation equal to or less than 80% of the mean pore diameter.
    Type: Application
    Filed: October 23, 2020
    Publication date: February 11, 2021
    Applicants: OSAKA UNIVERSITY, KOKEN CO., LTD
    Inventors: Ken NAKATA, Yukihiro SATO, Daisuke IKEDA, Ichiro FUJIMOTO
  • Patent number: 10901699
    Abstract: The design and development of a data analysis process is assisted and the burden on the user such as a data analyst in data analysis process is reduced.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: January 26, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Hiroaki Konoura, Ken Sugimoto, Yu Nakata, Masafumi Kinoshita
  • Publication number: 20200373423
    Abstract: A high electron mobility transistor (HEMT) made of primarily nitride semiconductor materials is disclosed. The HEMT, which is a type of reverse HEMT, includes, on a C-polar surface of a SiC substrate, a barrier layer and a channel layer each having N-polar surfaces in respective top surfaces thereof. The HEMT further includes an intermediate layer highly doped with impurities and a Schottky barrier layer on the channel layer. The Schottky barrier layer and a portion of the intermediate layer are removed in portions beneath non-rectifying electrodes but a gate electrode is provided on the Schottky barrier layer.
    Type: Application
    Filed: August 14, 2020
    Publication date: November 26, 2020
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Ken NAKATA
  • Patent number: 10790385
    Abstract: A high electron mobility transistor (HEMT) made of primarily nitride semiconductor materials is disclosed. The HEMT, which is a type of reverse HEMT, includes, on a C-polar surface of a SiC substrate, a barrier layer and a channel layer each having N-polar surfaces in respective top surfaces thereof. The HEMT further includes an intermediate layer highly doped with impurities and a Schottky barrier layer on the channel layer. The Schottky barrier layer and a portion of the intermediate layer are removed in portions beneath non-rectifying electrodes but a gate electrode is provided on the Schottky barrier layer.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: September 29, 2020
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Ken Nakata
  • Publication number: 20200161465
    Abstract: A process of forming a field transistor (FET) and a FET are disclosed. The FET includes a nitride semiconductor stack on a substrate. A pair of n+-regions made of oxide semiconductor material are provided within respective recesses in the semiconductor stack. Protecting layers, each made of oxide material, cover peripheries of the n+-regions. Electrodes are provided in openings in the protecting layers to be in direct contact with the n+-regions.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ken NAKATA
  • Publication number: 20200121826
    Abstract: To provide a collagen sponge excellent in mechanical strength and a production method for the collagen sponge. A collagen sponge including a porous construct having a pore structure, the collagen sponge having a tensile strength of 1 N or more and 5 N or less in every direction including a length direction and a width direction. The collagen sponge may be produced by a production method including the following steps: (1) a step of subjecting a collagen solution obtained by mixing collagen and a solvent to stirring and deaeration treatment; (2) a step of subjecting the collagen solution to freeze-dry treatment; and (3) a step of subjecting a dried collagen product after the freeze-dry treatment to insoluble treatment.
    Type: Application
    Filed: December 21, 2017
    Publication date: April 23, 2020
    Applicants: KOKEN CO., LTD., OSAKA UNIVERSITY
    Inventors: Ken NAKATA, Gaku KANNO
  • Patent number: 10580887
    Abstract: A process of forming a field effect transistor (FET) and a FET are disclosed. The process includes steps of forming a nitride semiconductor layer on a substrate; selectively growing an n+-region made of oxide semiconductor material on the nitride semiconductor layer and subsequently depositing oxide film on the n+-region; rinsing the oxide film with an acidic solution; forming an opening in the oxide film to expose the oxide semiconductor layer therein; and depositing a metal within the opening such that the metal is in direct contact with the n+-region.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: March 3, 2020
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ken Nakata
  • Publication number: 20200019383
    Abstract: The design and development of a data analysis process is assisted and the burden on the user such as a data analyst in data analysis process is reduced.
    Type: Application
    Filed: August 23, 2018
    Publication date: January 16, 2020
    Inventors: Hiroaki KONOURA, Ken SUGIMOTO, Yu NAKATA, Masafumi KINOSHITA
  • Publication number: 20190334023
    Abstract: A high electron mobility transistor (HEMT) made of primarily nitride semiconductor materials is disclosed. The HEMT, which is a type of reverse HEMT, includes, on a C-polar surface of a SiC substrate, a barrier layer and a channel layer each having N-polar surfaces in respective top surfaces thereof. The HEMT further includes an intermediate layer highly doped with impurities and a Schottky barrier layer on the channel layer. The Schottky barrier layer and a portion of the intermediate layer are removed in portions beneath non-rectifying electrodes but a gate electrode is provided on the Schottky barrier layer.
    Type: Application
    Filed: April 24, 2019
    Publication date: October 31, 2019
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS,INC.
    Inventor: Ken NAKATA
  • Patent number: 10263094
    Abstract: A process of forming a HEMT that makes the contact resistance of a non-rectifying electrode consistent with other device performance is disclosed. The process includes steps of growing a GaN channel layer with a thickness smaller than 600 nm on a SiC substrate at a growth temperature lower than 1050° C. and growing an AlN spacer layer with a flow rate of NH3 at most 10% smaller than a summed flow rate of NH3 and H2. The grown GaN channel layer includes a substantial density of threading dislocations and the grown AlN layer includes a substantial density of pits.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: April 16, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ken Nakata
  • Publication number: 20190097034
    Abstract: A process of forming a field effect transistor (FET) and a FET are disclosed. The process includes steps of forming a nitride semiconductor layer on a substrate; selectively growing an n+-region made of oxide semiconductor material on the nitrides semiconductor layer and subsequently depositing oxide film on the n+-region; rinsing the oxide film with an acidic solution; forming an opening in the oxide film to expose the oxide semiconductor layer therein; and depositing a metal within the opening such that the metal is in direct contact with the n+-region.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 28, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ken Nakata
  • Patent number: 10211323
    Abstract: A HEMT made of nitride semiconductor materials and a process of forming the same are disclosed, where the HEMT has n-type regions beneath the source and drain electrodes with remarkably increased carrier concentration. The HEMT provides the n-type regions made of at least one of epitaxially grown ZnO layer and MgZnO layer each doped with at least aluminum and gallium with density higher than 1×1020 cm?3. The process of forming the HEMT includes steps of forming recesses by dry-etching, epitaxially growing n-type layer, removing surplus n-type layer except within the recesses by dry-etching using hydrocarbon, and forming the electrodes on the n-type layer.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: February 19, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Ken Nakata
  • Patent number: 10147811
    Abstract: A process of forming a High Electron Mobility Transistor (HEMT) is disclosed. The HEMT includes a substrate, a channel layer, a barrier layer, and heavily doped regions made of metal oxide. The channel layer and the barrier layer provide recesses and a mesa therebetween. The heavily doped regions are formed by partially removing portions of a heavily doped layer on the mesa so as to have slant surfaces facing the gate electrode. The slant surfaces make angle of 135° to 160° relative to the top horizontal level of the mesa.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: December 4, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ken Nakata
  • Patent number: 10038086
    Abstract: A process of forming a High Electron Mobility Transistor (HEMT) made of nitride semiconductor materials is disclosed. The process sequentially grows a buffer layer, a n-type layer doped with n-type dopants, and a channel layer by a metal organic chemical vapor deposition (MOCVD) technique. A feature of the process is to supply only an n-type dopant gas before the growth of the n-type layer but after the growth of the buffer layer.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: July 31, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ken Nakata, Tsuyoshi Kouchi, Isao Makabe, Keiichi Yui
  • Publication number: 20180204928
    Abstract: A process of forming a HEMT that makes the contract resistance of a non-rectifying electrode consistent with other device performance is disclosed. The process includes steps of growing a GaN channel layer with a thickness smaller than 600 nm on a SiC substrate at a growth temperature lower than 1050° C. and an AlN spacer layer with a flow rate of NH3 at most 10% smaller than a summed flow rate of NH3 and H2. The grown GaN channel layer includes substantial density of threading dislocations and the grown AlN layer includes substantial density of the pits.
    Type: Application
    Filed: January 18, 2018
    Publication date: July 19, 2018
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Ken NAKATA
  • Publication number: 20180182871
    Abstract: A HEMT made of nitride semiconductor materials and a process of forming the same are disclosed, where the HEMT has n-type regions beneath the source and drain electrodes with remarkably increased carrier concentration. The HEMT provides the n-type regions made of at least one of epitaxially grown ZnO layer and MgZnO layer each doped with at least aluminum and gallium with density higher than 1×1020 cm?3. The process of forming the HEMT includes steps of forming recesses by dry-etching, epitaxially growing n-type layer, removing surplus n-type layer except within the recesses by dry-etching using hydrocarbon, and forming the electrodes on the n-type layer.
    Type: Application
    Filed: February 23, 2018
    Publication date: June 28, 2018
    Inventor: Ken Nakata
  • Publication number: 20180158926
    Abstract: A process of forming a nitride semiconductor is disclosed. The process includes steps of (a) growing an aluminum gallium nitride (GaN) as a channel layer, and (b) growing an indium aluminum gallium nitride (InAlGaN) as a barrier layer. The InAlGaN layer is grown at a temperature lower than a growth temperature for the GaN, and has an indium (In) composition less than 14% but preferably greater than 10%. The InAlGaN is substantially lattice-matched with the GaN.
    Type: Application
    Filed: December 4, 2017
    Publication date: June 7, 2018
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ken Nakata, Isao Makabe