Patents by Inventor Ken Orui

Ken Orui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8146243
    Abstract: A method of manufacturing a device-incorporated substrate as well as a printed circuit board. A transfer sheet is formed having a structure that includes two layers, a metal base material and a dissolvee metal layer and a conductor pattern is formed on the dissolvee metal layer by electroplating. After the transfer sheet on which the conductor pattern is formed is adhered onto an insulating base material, the transfer sheet is removed by separating the metal base material from the dissolvee metal layer and thereafter selectively dissolving and removing the dissolvee metal layer with respect to the conductor pattern.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: April 3, 2012
    Assignee: Sony Corporation
    Inventors: Hiroshi Asami, Ken Orui, Hidetoshi Kusano, Fumito Hiwatashi
  • Patent number: 7421777
    Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: September 9, 2008
    Assignee: Sony Corporation
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuki Nishitani, Ken Orui
  • Patent number: 7420127
    Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: September 2, 2008
    Assignee: Sony Corporation
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuji Nishitani, Ken Orui
  • Publication number: 20070293038
    Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Application
    Filed: August 8, 2007
    Publication date: December 20, 2007
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuji Nishitani, Ken Orui
  • Patent number: 7288724
    Abstract: A method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiling substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: October 30, 2007
    Assignee: Sony Corporation
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuji Nishitani, Ken Orui
  • Publication number: 20070102191
    Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Application
    Filed: December 22, 2006
    Publication date: May 10, 2007
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuji Nishitani, Ken Orui
  • Patent number: 7053315
    Abstract: To provide a junction structure and a junction method for conductive projection advantageous in that a required reinforcement strength can be obtained while suppressing the amount of a reinforcing resin material supplied to prevent warpage due to curing shrinkage. A conductive projection is joined to the surface of a conductor portion formed at the same level as that of the surface of the insulating layer so that a root portion of the projection is surrounded by a fillet-form resin material. The resin material contains an activator which assists in the junction between the conductive projection and the conductor portion when the resin material is in an uncured state, and is fused by heating to wet and rise the root portion of the conductive projection so as to be in a fillet form. The resin material is cured by an ultraviolet light while excluding the resin material on the conductor portion.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: May 30, 2006
    Assignee: Sony Corporation
    Inventors: Ken Orui, Hiroko Jinno, Yuji Nishitani, Hiroshi Asami
  • Publication number: 20050142852
    Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Application
    Filed: February 22, 2005
    Publication date: June 30, 2005
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuji Nishitani, Ken Orui
  • Publication number: 20050056445
    Abstract: To provide a junction structure and a junction method for conductive projection advantageous in that a required reinforcement strength can be obtained while suppressing the amount of a reinforcing resin material supplied to prevent warpage due to curing shrinkage. A conductive projection is joined to the surface of a conductor portion formed at the same level as that of the surface of the insulating layer so that a root portion of the projection is surrounded by a fillet-form resin material. The resin material contains an activator which assists in the junction between the conductive projection and the conductor portion when the resin material is in an uncured state, and is fused by heating to wet and rise the root portion of the conductive projection so as to be in a fillet form. The resin material is cured by an ultraviolet light while excluding the resin material on the conductor portion.
    Type: Application
    Filed: March 17, 2004
    Publication date: March 17, 2005
    Inventors: Ken Orui, Hiroko Jinno, Yuji Nishitani, Hiroshi Asami
  • Publication number: 20040003494
    Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Application
    Filed: March 31, 2003
    Publication date: January 8, 2004
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuji Nishitani, Ken Orui