Abstract: A solid state imaging device includes a substrate having a plurality of pixels and a plurality of on-chip lenses arranged above the substrate, each on-chip lens having a lens surface formed by subjecting a transparent photosensitive film to exposure using a mask having a gradation pattern and development so that the lens surface serves to correct shading in accordance with the gradation pattern.

Abstract: A semiconductor chip comprises a semiconductor substrate, a multi-layer wiring structure on the semiconductor substrate, a seal ring structure on the semiconductor substrate, and a semiconductor element arranged in an inner region of said semiconductor chip and in a frame region of said semiconductor chip. The semiconductor element comprises a chip internal circuit, the inner region is enclosed by the seal ling structure, and the seal ring structure separates the frame region as being outside of the inner region.

Abstract: A solid state imaging device includes a substrate having a plurality of pixels and a plurality of on-chip lenses arranged above the substrate, each on-chip lens having a lens surface formed by subjecting a transparent photosensitive film to exposure using a mask having a gradation pattern and development so that the lens surface serves to correct shading in accordance with the gradation pattern.

Abstract: An exposure mask forms a three-dimensional shape in simple structure and obtainable sufficient number of gray scales by exposure. In an exposure mask (M) for use in an exposure apparatus (S), the present invention is provided such that a plurality of pattern blocks constituted by a pair of a light blocking pattern blocking light emitted from the exposure apparatus (S) and a transmissive pattern transmitting the light are continuously arranged while a pitch of the continuous pattern blocks is constant and a ratio of the light blocking pattern to the transmissive pattern is varied gradually.

Abstract: There is provided a method for correcting a photo mask, which allows the difference between a test mask and a corrected mask with respect to an error of line width depending on coarse/dense pattern to be decreased when the photo masks are corrected by optical proximity effect correction.

Abstract: An exposure mask in the form of a binary mask for intensity modulating 0th order diffracted light and a mask pattern production method using the exposure mask are disclosed on which a mask production error, an influence of flare of an exposure apparatus and a development characteristic of resist reflect on the design. The exposure mask has a block area in which a plurality of pattern sites in each of which light intercepting patterns for intercepting illumination light emitted from an exposure apparatus and light transmitting patterns for transmitting the illumination light therethrough are formed at an equal ratio and an equal pitch are disposed. The pattern sites which form the block area are disposed such that the pitches of the light intercepting patterns and the light transmitting patterns are equal while the ratio varies gradually.

Abstract: There is provided a method for correcting a photo mask, which allows the difference between a test mask and a corrected mask with respect to an error of line width depending on coarse/dense pattern to be decreased when the photo masks are corrected by optical proximity effect correction.

Abstract: A lens assembly for transmitting an optical signal has a light-emitting element that diffuses the optical signal and a collimator lens that converts the optical signal diffused out of the light-emitting element from its diffused light into parallel light. The device also has a condenser lens that gathers the parallel light output from the collimator lens to focus the parallel light into an opening of an optical waveguide. The opening is provided in an end of the optical waveguide. An optical axis of the condenser lens is shifted toward the other 10 end of the waveguide by a predetermined distance with respect to an optical axis of the collimator lens.

Abstract: An antireflective film is provided between a resist layer and a silicon oxide layer formed on a surface of a silicon substrate, for exposure of the resist layer in an exposure system having a wavelength of 190 nm to 195 nm and a numerical aperture NA of 0.93 to 1.2. Assuming that the complex refractive indexes of upper and lower layers constituting the antireflective film are N1 (=n1?k1i) and N2 (=n2?k2i), respectively, and the thicknesses of both layers are d1 and d2, when a predetermined combination of values of [n10, k10, d10, n20, k20, d20] is selected, n1, k1, d1, n2, k2, and d2 satisfy the relational expression {(n1?n10)/(n1m?n10)}2+{(k1?k10)/(k1m?k10)}2+{(d1? d10)/(d1m?d10)}2+{(n2?n20)/(n2m?n20)}2+{(k2?k20)/(k2m? k20)}2+{(d2?d20)/(d2m?d20)}2?1.

Abstract: A semiconductor device includes a semiconductor substrate having electronic elements produced therein, and an insulating underlayer formed thereon, and a multi-layered wiring arrangement constructed on the insulating underlayer semiconductor substrate. The multi-layered wiring arrangement includes a first insulating interlayer structure formed on the insulating underlayer, a second insulating interlayer structure, and a third insulating interlayer structure formed on the first insulating interlayer structure. Each of the first, second and third insulating interlayer structures includes a low-k insulating layer, and has a reinforcing element formed therein. The second insulating interlayer structure has a joint plug formed therein. The reinforcing elements of the first and third insulating interlayer structures are connected to each other through the joint plug.

Abstract: An antireflection film wherein, even where exposure light enters obliquely in a liquid immersion lithography technique, a sufficiently reduced reflectance can be achieved at the interface between a resist layer and a silicon substrate. A two-layer antireflection film is used in exposure by an exposure system having a wavelength of 190 to 195 nm and a numerical aperture of 1.0 or less and formed between the resist layer and the silicon substrate. Where complex refractive indices N1 and N2 and film thicknesses of upper and lower layers of the antireflection film are represented by n1-k1i, n2-k2i and d1, d2, respectively, and a predetermined combination of values of [n10, k10, d10, n20, k20, d20] is selected, n1, k1, d1, n2, k2 and d2 satisfy {(n1-n10)/(n1m-n10)}2+{(k1-k10)/(k1m-k10)}2+{(d1-d10)/(d1m-d10)}2+{(n2-n20)/(n2m-n20)}2+{(k2-k20)/(k2m-k20)}2+{(d2-d20)/(d2m-d20)}2?1.

Abstract: A lens assembly for transmitting an optical signal has a light-emitting element that diffuses the optical signal and a collimator lens that converts the optical signal diffused out of the light-emitting element from its diffused light into parallel light. The device also has a condenser lens that gathers the parallel light output from the collimator lens to focus the parallel light into an opening of an optical waveguide. The opening is provided in an end of the optical waveguide. An optical axis of the condenser lens is shifted toward the other 10 end of the waveguide by a predetermined distance with respect to an optical axis of the collimator lens.

Abstract: A solid state imaging device includes a substrate having a plurality of pixels and a plurality of on-chip lenses arranged above the substrate, each on-chip lens having a lens surface formed by subjecting a transparent photosensitive film to exposure using a mask having a gradation pattern and development so that the lens surface serves to correct shading in accordance with the gradation pattern.

Abstract: A semiconductor capacitor configured so as to use buried wirings, as electrodes, formed in an interlayer dielectric is provided on a semiconductor substrate which is capable of preventing an increase in a number of manufacturing processes with occurrence of parasitic capacity being suppressed. The semiconductor capacitor has a capacitive insulating film made up of an etching stopper film formed only in a region being sandwiched between a via plug serving as an upper electrode and a lower electrode, in which the capacitive insulating film is not formed in a region other than the facing region.

Abstract: There is provided a method for correcting a photo mask, which allows the difference between a test mask and a corrected mask with respect to an error of line width depending on coarse/dense pattern to be decreased when the photo masks are corrected by optical proximity effect correction.

Abstract: An exposure mask forms a three-dimensional shape in simple structure and obtainable sufficient number of gray scales by exposure. In an exposure mask (M) for use in an exposure apparatus (S), the present invention is provided such that a plurality of pattern blocks constituted by a pair of a light blocking pattern blocking light emitted from the exposure apparatus (S) and a transmissive pattern transmitting the light are continuously arranged while a pitch of the continuous pattern blocks is constant and a ratio of the light blocking pattern to the transmissive pattern is varied gradually.

Abstract: A semiconductor device includes a semiconductor substrate having electronic elements produced therein, and an insulating underlayer formed thereon, and a multi-layered wiring arrangement constructed on the insulating underlayer semiconductor substrate. The multi-layered wiring arrangement includes a first insulating interlayer structure formed on the insulating underlayer, a second insulating interlayer structure, and a third insulating interlayer structure formed on the first insulating interlayer structure. Each of the first, second and third insulating interlayer structures includes a low-k insulating layer, and has a reinforcing element formed therein. The second insulating interlayer structure has a joint plug formed therein. The reinforcing elements of the first and third insulating interlayer structures are connected to each other through the joint plug.

Abstract: An exposure mask in the form of a binary mask for intensity modulating 0th order diffracted light and a mask pattern production method using the exposure mask are disclosed on which a mask production error, an influence of flare of an exposure apparatus and a development characteristic of resist reflect on the design. The exposure mask has a block area in which a plurality of pattern sites in each of which light intercepting patterns for intercepting illumination light emitted from an exposure apparatus and light transmitting patterns for transmitting the illumination light therethrough are formed at an equal ratio and an equal pitch are disposed. The pattern sites which form the block area are disposed such that the pitches of the light intercepting patterns and the light transmitting patterns are equal while the ratio varies gradually.

Abstract: A semiconductor capacitor configured so as to use buried wirings, as electrodes, formed in an interlayer dielectric is provided on a semiconductor substrate which is capable of preventing an increase in a number of manufacturing processes with occurrence of parasitic capacity being suppressed. The semiconductor capacitor has a capacitive insulating film made up of an etching stopper film formed only in a region being sandwiched between a via plug serving as an upper electrode and a lower electrode, in which the capacitive insulating film is not formed in a region other than the facing region.

Abstract: A semiconductor capacitor configured so as to use buried wirings, as electrodes, formed in an interlayer dielectric is provided on a semiconductor substrate which is capable of preventing an increase in a number of manufacturing processes with occurrence of parasitic capacity being suppressed. The semiconductor capacitor has a capacitive insulating film made up of an etching stopper film formed only in a region being sandwiched between a via plug serving as an upper electrode and a lower electrode, in which the capacitive insulating film is not formed in a region other than the facing region.