Patents by Inventor Ken S. McElvain

Ken S. McElvain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Techniques for use with automated circuit design and simulations
    Patent number: 8707235
    Abstract: An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within each of the carry chain structures has an associated input node, output node and carry node. The input node corresponds to a function input term, the output node corresponds to an output term of the function and the carry node corresponds to a carry value to a following logical structure in the series of logical structures.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: April 22, 2014
    Assignee: Synopsis, Inc.
    Inventor: Ken S. McElvain
  • Techniques for Use with Automated Circuit Design and Simulations
    Publication number: 20120066279
    Abstract: An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within each of the carry chain structures has an associated input node, output node and carry node. The input node corresponds to a function input term, the output node corresponds to an output term of the function and the carry node corresponds to a carry value to a following logical structure in the series of logical structures.
    Type: Application
    Filed: November 21, 2011
    Publication date: March 15, 2012
    Inventor: Ken S. McElvain
  • Techniques for use with automated circuit design and simulations
    Patent number: 8065650
    Abstract: An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within each of the carry chain structures has an associated input node, output node and carry node. The input node corresponds to a function input term, the output node corresponds to an output term of the function and the carry node corresponds to a carry value to a following logical structure in the series of logical structures.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: November 22, 2011
    Assignee: Synopsys, Inc.
    Inventor: Ken S. McElvain
  • Method and apparatus for parallel carry chains
    Patent number: 7836417
    Abstract: An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within each of the carry chain structures has an associated input node, output node and carry node. The input node corresponds to a function input term, the output node corresponds to an output term of the function and the carry node corresponds to a carry value to a following logical structure in the series of logical structures.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: November 16, 2010
    Assignee: Synopsys, Inc.
    Inventor: Ken S. McElvain
  • TECHNIQUES FOR USE WITH AUTOMATED CIRCUIT DESIGN AND SIMULATIONS
    Publication number: 20080288899
    Abstract: An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within each of the carry chain structures has an associated input node, output node and carry node. The input node corresponds to a function input term, the output node corresponds to an output term of the function and the carry node corresponds to a carry value to a following logical structure in the series of logical structures.
    Type: Application
    Filed: July 25, 2008
    Publication date: November 20, 2008
    Inventor: Ken S. McElvain
  • Method and apparatus for parallel carry chains
    Patent number: 7051296
    Abstract: An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within each of the carry chain structures has an associated input node, output node and carry node. The input node corresponds to a function input term, the output node corresponds to an output term of the function and the carry node corresponds to a carry value to a following logical structure in the series of logical structures.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: May 23, 2006
    Assignee: Synplicity, Inc.
    Inventor: Ken S. McElvain
  • Method and apparatus for parallel carry chains
    Patent number: 6807556
    Abstract: An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within each of the carry chain structures has an associated input node, output node and carry node. The input node corresponds to a function input term, the output node corresponds to an output term of the function and the carry node corresponds to a carry value to a following logical structure in the series of logical structures.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: October 19, 2004
    Assignee: Synplicity, Inc.
    Inventor: Ken S. McElvain