Patents by Inventor Ken Schatz

Ken Schatz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180213608
    Abstract: A heater assembly for a substrate support assembly includes a flexible body. The heater assembly further includes one or more resistive heating elements disposed in the flexible body. The heater assembly further includes a first metal layer disposed on the top surface of the flexible body and extending at least partially onto an outer sidewall of the flexible body. The heater assembly further includes a second metal layer disposed on a bottom surface of the flexible body and extending at least partially onto the outer sidewall of the flexible body, wherein the second metal layer is coupled to the first metal layer at the outer sidewall of the flexible body such that the first metal layer and the second metal layer enclose, and form a continuous electrically conductive path around, the outer sidewall of the flexible body.
    Type: Application
    Filed: January 20, 2017
    Publication date: July 26, 2018
    Inventors: David Benjaminson, Ken Schatz, Dmitry Lubomirsky
  • Patent number: 6645353
    Abstract: A sputter etch system and a method of conducting a sputter etch. The sputter etch system includes an etch chamber with a wafer pedestal having a top surface to support a wafer and a magnet configured to provide a continuous magnetic field directed at the top surface of the wafer pedestal.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: November 11, 2003
    Assignee: Intel Corporation
    Inventors: Brett E. Huff, Ken Schatz, Mike Maxim, William G. Petro
  • Publication number: 20030136664
    Abstract: A sputter etch system and a method of conducting a sputter etch. The sputter etch system includes an etch chamber with a wafer pedestal having a top surface to support a wafer and a magnet configured to provide a continuous magnetic field directed at the top surface of the wafer pedestal.
    Type: Application
    Filed: December 31, 1997
    Publication date: July 24, 2003
    Inventors: BRETT E. HUFF, KEN SCHATZ, MIKE MAXIM, WILLIAM G. PETRO
  • Patent number: 6365521
    Abstract: A method of passivating an integrated circuit comprising providing an integrated circuit having a top side including a bond pad, depositing a first dielectric over said top side of said integrated circuit, exposing a first area portion of a top side of said bond pad, depositing a second dielectric of one of a material that is substantially impermeable to moisture over said top side of said integrated circuit, and exposing a second area portion of said top side of said bond pad, said second area portion within said first area portion is disclosed.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: April 2, 2002
    Assignee: Intel Corporation
    Inventors: Jan V. Shubert, Glen Wada, Mansour Moinpour, Yang-Chin Shih, Ken Schatz