Patents by Inventor Ken Shono

Ken Shono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8836308
    Abstract: A first transistor coupled between a power supply line and an inductor, a second transistor coupled between a source of the first transistor and a reference voltage line, and a third transistor coupled between the source of the first transistor and a load are included, and efficiency deterioration caused by a dead time is improved by keeping a current flow through a current path of an inductor, a load, and the third transistor during the dead time by supplying a voltage which is less than a threshold voltage and approximately the threshold voltage to a gate of the third transistor as a gate voltage.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: September 16, 2014
    Assignee: Transphorm Japan, Inc.
    Inventor: Ken Shono
  • Patent number: 8836301
    Abstract: A power supply unit includes first and second sub-power supply module, each having first and second inductor, first and second switching element which switches current supplied from an input power supply to the first and second inductor, first and second drive control circuit which drives the first and second switching element, and first and second sub-output terminal to which current is output from the first and second inductor respectively; and a common output terminal to which the first sub-output terminal and the second sub-output terminal are coupled, wherein an ON operation of the first switching element is controlled depending on whether or not an output voltage of the common output terminal is lower than a first voltage, and an ON operation of the second switching element is controlled depending on whether or not the output voltage is lower than a second voltage, which is different from the first voltage.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: September 16, 2014
    Assignee: Transphorm Japan, Inc.
    Inventor: Ken Shono
  • Patent number: 8675326
    Abstract: A bidirectional switch device, has: a bidirectional switch having a HEMT; and a control circuit which, during a first condition, applies a first voltage lower than a threshold voltage across a gate and one terminal among a source and a drain of the HEMT to turn off a first current path from the other terminal among the source and the drain to the one terminal, and during a second condition, applies a second voltage lower than the threshold voltage across the other terminal and the gate to turn off a second current path from the one terminal to the other terminal, and further during a third condition, applies a third voltage higher than the threshold voltage across the source and the gate and across the drain and the gate of the HEMT to turn on the first and second current paths.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: March 18, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Ken Shono
  • Patent number: 8664927
    Abstract: A voltage regulator includes: a normally-on first transistor coupled to an input voltage; an inductor provided between the first transistor and an output terminal; a return circuit provided between a reference voltage and a connection node of the first transistor and the inductor; a drive circuit that supplies a drive signal to a gate of the first transistor; and a negative voltage generation circuit that is coupled to the reference voltage, generates a negative voltage on the basis of a pulse signal generated at the connection node by switching operation of the first transistor, and supplies the negative voltage to the drive circuit.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: March 4, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Ken Shono
  • Patent number: 8530996
    Abstract: A semiconductor device includes a high-side field-effect transistor including a high-side drain electrode, a high-side gate electrode, and a high-side source electrode; and a first low-side field-effect transistor including a first low-side drain electrode, a first low-side gate electrode and a first low-side source electrode, wherein the high-side source electrode and the first low-side drain electrode are shared as a single source and drain electrode, and the high-side drain electrode, the high-side gate electrode, the source and drain electrode, the first low-side gate electrode and the first low-side source electrode are arranged in this order while being interposed by gaps, respectively.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: September 10, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Ken Shono
  • Publication number: 20120326681
    Abstract: A power supply unit includes first and second sub-power supply module, each having first and second inductor, first and second switching element which switches current supplied from an input power supply to the first and second inductor, first and second drive control circuit which drives the first and second switching element, and first and second sub-output terminal to which current is output from the first and second inductor respectively; and a common output terminal to which the first sub-output terminal and the second sub-output terminal are coupled, wherein an ON operation of the first switching element is controlled depending on whether or not an output voltage of the common output terminal is lower than a first voltage, and an ON operation of the second switching element is controlled depending on whether or not the output voltage is lower than a second voltage, which is different from the first voltage.
    Type: Application
    Filed: April 30, 2012
    Publication date: December 27, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Ken SHONO
  • Publication number: 20120306469
    Abstract: A voltage regulator includes: a normally-on first transistor coupled to an input voltage; an inductor provided between the first transistor and an output terminal; a return circuit provided between a reference voltage and a connection node of the first transistor and the inductor; a drive circuit that supplies a drive signal to a gate of the first transistor; and a negative voltage generation circuit that is coupled to the reference voltage, generates a negative voltage on the basis of a pulse signal generated at the connection node by switching operation of the first transistor, and supplies the negative voltage to the drive circuit.
    Type: Application
    Filed: March 22, 2012
    Publication date: December 6, 2012
    Applicant: Fujitsu Semiconductor Limited
    Inventor: Ken SHONO
  • Publication number: 20120275076
    Abstract: A bidirectional switch device, has: a bidirectional switch having a HEMT; and a control circuit which, during a first condition, applies a first voltage lower than a threshold voltage across a gate and one terminal among a source and a drain of the HEMT to turn off a first current path from the other terminal among the source and the drain to the one terminal, and during a second condition, applies a second voltage lower than the threshold voltage across the other terminal and the gate to turn off a second current path from the one terminal to the other terminal, and further during a third condition, applies a third voltage higher than the threshold voltage across the source and the gate and across the drain and the gate of the HEMT to turn on the first and second current paths.
    Type: Application
    Filed: February 8, 2012
    Publication date: November 1, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Ken SHONO
  • Publication number: 20120105146
    Abstract: A first transistor coupled between a power supply line and an inductor, a second transistor coupled between a source of the first transistor and a reference voltage line, and a third transistor coupled between the source of the first transistor and a load are included, and efficiency deterioration caused by a dead time is improved by keeping a current flow through a current path of an inductor, a load, and the third transistor during the dead time by supplying a voltage which is less than a threshold voltage and approximately the threshold voltage to a gate of the third transistor as a gate voltage.
    Type: Application
    Filed: June 23, 2011
    Publication date: May 3, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Ken SHONO
  • Publication number: 20120098038
    Abstract: A semiconductor device includes a high-side field-effect transistor including a high-side drain electrode, a high-side gate electrode, and a high-side source electrode; and a first low-side field-effect transistor including a first low-side drain electrode, a first low-side gate electrode and a first low-side source electrode, wherein the high-side source electrode and the first low-side drain electrode are shared as a single source and drain electrode, and the high-side drain electrode, the high-side gate electrode, the source and drain electrode, the first low-side gate electrode and the first low-side source electrode are arranged in this order while being interposed by gaps, respectively.
    Type: Application
    Filed: June 15, 2011
    Publication date: April 26, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Ken SHONO
  • Patent number: 6031246
    Abstract: A simulation method capable of efficiently evaluating reliability of gate oxide films formed on the elements within short periods of time to evaluate characteristics of a semiconductor device made up of elements of any size and any number. In a semiconductor device having transistors formed thereon, a pattern for evaluating characteristics of a semiconductor device characterized in that gate area portions, gate bird's-beak portions and LOCOS bird's-beak portions, are factors affecting the insulation breakdown of the gate oxide film, are rendered to be variable, so that the shapes of these portions can be handled as independent parameters.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: February 29, 2000
    Assignee: Fujitsu Limited
    Inventors: Makoto Hamada, Ken Shono
  • Patent number: 5886363
    Abstract: To provide a simulation method capable of efficiently evaluating reliability of gate oxide films formed on the elements within short periods of time to evaluate characteristics of a semiconductor device made up of elements of any size and any number.In a semiconductor device having transistors formed thereon, a pattern 1 for evaluating characteristics of a semiconductor device characterized in that gate area portions 9, gate bird's-beak portions 10 and LOCOS bird's-beak portions 11, are factors affecting the insulation breakdown of the gate oxide film, are rendered to be variable, so that the shapes of these portions can be handled as independent parameters.
    Type: Grant
    Filed: November 4, 1997
    Date of Patent: March 23, 1999
    Assignee: Fujitsu Limited
    Inventors: Makoto Hamada, Ken Shono