Patents by Inventor Ken Takanashi

Ken Takanashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8987376
    Abstract: Disclosed is a polyimide composition for semiconductor devices, which has a rheological characteristics suited for screen printing and dispense coating, which has an improved wetting property with various coating bases, by which continuous printing of 500 times or more can be attained, with which blisters, cissing and pinholes are not generated after printing and drying or during drying or curing, which can coat a desired area. A method of forming a film in a semiconductor and semiconductors having the film formed by this method as an insulation film, protective film or the like are also disclosed. The composition for semiconductor devices contains a mixed solvent of a first organic solvent (A) and a second organic solvent (B); and a polyimide resin having at least one group selected from the group consisting of alkyl groups and perfluoroalkyl groups in recurring units, and having thixotropic property, the polyimide resin being dissolved in the mixed solvent.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: March 24, 2015
    Assignees: PI R&D Co., Ltd., Mitsubishi Electric Corporation
    Inventors: Toshiyuki Goshima, Sigemasa Segawa, Maw Soe Win, Junichi Yamashita, Ken Takanashi
  • Publication number: 20110213075
    Abstract: Disclosed is a polyimide composition for semiconductor devices, which has a rheological characteristics suited for screen printing and dispense coating, which has an improved wetting property with various coating bases, by which continuous printing of 500 times or more can be attained, with which blisters, cissing and pinholes are not generated after printing and drying or during drying or curing, which can coat a desired area. A method of forming a film in a semiconductor and semiconductors having the film formed by this method as an insulation film, protective film or the like are also disclosed. The composition for semiconductor devices contains a mixed solvent of a first organic solvent (A) and a second organic solvent (B); and a polyimide resin having at least one group selected from the group consisting of alkyl groups and perfluoroalkyl groups in recurring units, and having thixotropic property, the polyimide resin being dissolved in the mixed solvent.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 1, 2011
    Inventors: Toshiyuki GOSHIMA, Sigemasa Segawa, Maw Soe Win, Junichi Yamashita, Ken Takanashi
  • Patent number: 7081671
    Abstract: In a power module (111), a free-wheeling diode (1A), an IGBT (1B), and a capacitor (20) for smoothing direct current are disposed directly on a surface (2BS) of a conductive heat sink (2B) with through holes (2BH). The rear electrodes of the free wheeling diode (1A), the IGBT (1B), and the capacitor (20) are bonded to the heat sink (2B) for example with solder, whereby the diode (1A), the IGBT (1B), and the capacitor (20) are electrically connected with the heat sink (2B). The front electrodes of the diode (1A), the IGBT (1B), and the capacitor (20) are connected with each other for example by wires (7). In the heat sink (2B), a cooling medium flows through the through holes (2BH). Such a configuration allows miniaturization of the power module and improves the cooling performance and reliability of the power module.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: July 25, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masakazu Fukada, Dai Nakajima, Ken Takanashi
  • Patent number: 6501172
    Abstract: In a powder module (111), a free-wheeling diode (1A), an IGBH (1B), and a capacitor (20) for smoothing direct current are disposed directly on a surface (2BS) of a conductive heat sink (2B) with through holes (2BH). The rear electrodes of the free-wheeling diode (1A), the IGBT (1B), and the capacitor (20) are bonded to the heat sink (2B) for example with solder, whereby the diode (1A), the IGBT (1B), and the capacitor (20) are electrically connected with the heat sink (2B). The front electrodes of the diodes (1A), the IGBT (1B), and the capacitor (20) are connected with each other for example by wires (7). In the heat sink (2B), a cooling medium flows through the through holes (2BH). Such a configuration allows miniaturization of the power module and improves the cooling performance and reliability of the power module.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: December 31, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masakazu Fukada, Dai Nakajima, Ken Takanashi
  • Publication number: 20020186545
    Abstract: In a power module (111), a free-wheeling diode (1A), an IGBT (1B), and a capacitor (20) for smoothing direct current are disposed directly on a surface (2BS) of a conductive heat sink (2B) with through holes (2BH). The rear electrodes of the freewheeling diode (1A), the IGBT (1B), and the capacitor (20) are bonded to the heat sink (2B) for example with solder, whereby the diode (1A), the IGBT (1B), and the capacitor (20) are electrically connected with the heat sink (2B). The front electrodes of the diode (1A), the IGBT (1B), and the capacitor (20) are connected with each other for example by wires (7). In the heat sink (2B), a cooling medium flows through the through holes (2BH). Such a configuration allows miniaturization of the power module and improves the cooling performance and reliability of the power module.
    Type: Application
    Filed: August 13, 2002
    Publication date: December 12, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Masakazu Fukada, Dai Nakajima, Ken Takanashi
  • Patent number: 6351399
    Abstract: To prevent malfunction or breakdown due to a surge voltage in a power converter for converting DC into AC or the like so as to supply electric power to a load, not only a control signal is transmitted via a level shift circuit which is provided correspondingly to each of switching semiconductor elements forming a main circuit and shifts a level of a reference potential at its output side so as to follow variations of a reference potential of the switching semiconductor element to the switching semiconductor element, but a DC control power source for supplying electric power to the level shift circuit and a negative pole of the switching semiconductor element are connected to each other through at least one of an inductor and a resistance.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: February 26, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Takanashi, Shinji Hatae, Kazuaki Hiyama, Khalid Hassan Hussein, Fumitaka Tametani
  • Patent number: 6304448
    Abstract: Obtained is a power module which is excellent in electromagnetic shielding effects, is rarely influenced by external noises and acts as an external noise source with difficulty. An insulating substrate (5) is bonded through a solder (4) to a top surface of a heat sink (3) fixed to a support plate (2). A DC capacitor (16) is fixed to a bottom face of the heat sink (3) by adhesion. A control substrate (11) having a control IC (13) mounted thereon is fixed to the support plate (2). Moreover, a plurality of electrodes (10), a DC side electrode and refrigerant inlet-outlet (9) and a control connector (15) are provided on the support plate (2). A case (1) is fixed to a peripheral portion of the support plate (2), and surrounds the insulating substrate (5), the control substrate (11), the heat sink (3) and the DC capacitor 16 together with the support plate (2). Both the case (1) and the support plate (2) have conducting property.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: October 16, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masakazu Fukada, Dai Nakajima, Ken Takanashi
  • Publication number: 20010028572
    Abstract: To prevent malfunction or breakdown due to a surge voltage in a power converter for converting DC into AC or the like so as to supply electric power to a load, not only a control signal is transmitted via a level shift circuit which is provided correspondingly to each of switching semiconductor elements forming a main circuit and shifts a level of a reference potential at its output side so as to follow variations of a reference potential of the switching semiconductor element to the switching semiconductor element, but a DC control power source for supplying electric power to the level shift circuit and a negative pole of the switching semiconductor element are connected to each other through at least one of an inductor and a resistance.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 11, 2001
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Ken Takanashi, Shinji Hatae, Kazuaki Hiyama, Khalid Hassan Hussein, Fumitaka Tametani
  • Patent number: 5444297
    Abstract: In a circuit board having four-layered conductive pattern on which a control circuit is arranged, wiring sub-patterns 133a in the first layer are divided into four areas A1-A3 and A8, for respective sets of circuit parts having same power potentials. Respective sub-patterns belonging to the areas A1-A3 are partially or fully surrounded by wiring sub-patterns PEa1 PEa3 connected to negative power potentials of circuit parts belonging to respective areas, respectively. Similarly, at least part of a wiring patten Pa2 for transmitting an input signal to a semiconductor active element is surrounded by a wiring pattern PEa4. Penetration of electric noises to the wiring patterns for the control circuit, in particular to the wiring pattern for transmitting the input signal to semiconductor element, is decreased to thereby prevent misoperation due to electric noises.
    Type: Grant
    Filed: June 11, 1993
    Date of Patent: August 22, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Seiichi Oshima, Fumitaka Tametani, Jun Yamagata, Ken Takanashi
  • Patent number: 4982261
    Abstract: Respective side ends (20s, 1s) of a T.sub.1 electrode (20) and a gate electrode (1) of a TRIAC (70) are mutually adjacent and located on a P.sub.1 layer (13). The side ends (20s, 1s) are connected electrically by a resistance area (13a) which is made of the same material as a semiconductor material used to make the P.sub.1 layer (13). A gate current branches into first and second branch currents (I.sub.GT1, I.sub.GT2). Because the second branch current does not contribute to the turn on of the TRIAC, undesirable (dv/dt) turn on is prevented.
    Type: Grant
    Filed: March 23, 1988
    Date of Patent: January 1, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Ken Takanashi