Patents by Inventor Ken Tsutsui

Ken Tsutsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120025196
    Abstract: An organic thin film transistor includes an organic semiconductor layer, a source electrode and a drain electrode which are separated from each other and are individually in contact with the organic semiconductor layer, a gate insulating film which is in contact with the organic semiconductor layer between the source and drain electrodes, and a gate electrode which is opposed to the organic semiconductor layer and is in contact with the gate insulating film. In the organic thin film transistor, a high-concentration region of the organic semiconductor layer which is located near the source electrode has an impurity concentration set higher than an impurity concentration of a low-concentration region of the organic semiconductor layer, the low-concentration region being located near the gate electrode in the thickness direction of the organic semiconductor layer between the source and drain electrodes.
    Type: Application
    Filed: January 18, 2010
    Publication date: February 2, 2012
    Applicant: TOYO UNIVERSITY
    Inventors: Yasuo Wada, Toru Toyabe, Ken Tsutsui
  • Patent number: 7272450
    Abstract: A development aid device for development of a ladder program for a programmable controller has a program memory for storing the ladder program and an outline data generating part for sequentially scanning constituent elements of this stored ladder program to extract specified elements including output commands and generating outline data by assigning individual index numbers to these extracted elements sequentially in the order of their appearance on the ladder program. An outline data memory stores the generated outline data. A cross-reference data generating part generates cross-reference data by extracting commands having a same operand from the ladder program, and a cross-reference data memory stores the generated cross-reference data.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: September 18, 2007
    Assignee: OMRON Corporation
    Inventors: Makoto Inoue, Ken Tsutsui, Takashi Miyake
  • Patent number: 7272825
    Abstract: A development aid device for development of a ladder program such as a user program for a programmable controller has a program memory for storing the user program and an outline data generating part for sequentially scanning constituent elements of this stored user program to extract specified elements including output commands and generating outline data by assigning individual index numbers to these extracted elements sequentially in the order of their appearance on the user program. An outline data memory stores the generated outline data. A cross-reference data generating part generates cross-reference data by extracting commands having a same operand from the user program, and a cross-reference data memory stores the generated cross-reference data.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: September 18, 2007
    Assignee: OMRON Corporation
    Inventors: Makoto Inoue, Ken Tsutsui, Takashi Miyake
  • Publication number: 20070078538
    Abstract: The present invention aims to provide a debug device for efficiently and smoothly performing the debugging process of the control program including function blocks. In the debug device for executing each step configuring the control program including the function blocks one step at a time, a step-over function for continuously executing the program in the function block, and moving the executing position to the step after the execution of the function program in the control program when the next executing position is the function block (FIG. A); a step-in function for having the head position of the program in the function block as the next executing position when the next executing position is the function block; and a step-out function for continuously executing from the next executing position to the end of the function block and moving the executing position to the step after the execution of the function block when the next executing position is the step of the program in the function block are provided.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 5, 2007
    Inventors: Yukihiro Kawakami, Yutaka Abe, Ken Tsutsui, Koji Yaoita, Takahisa Hasegawa
  • Publication number: 20060247806
    Abstract: A development aid device for development of a ladder program such as a user program for a programmable controller has a program memory for storing the user program and an outline data generating part for sequentially scanning constituent elements of this stored user program to extract specified elements including output commands and generating outline data by assigning individual index numbers to these extracted elements sequentially in the order of their appearance on the user program. An outline data memory stores the generated outline data. A cross-reference data generating part generates cross-reference data by extracting commands having a same operand from the user program, and a cross-reference data memory stores the generated cross-reference data.
    Type: Application
    Filed: June 26, 2006
    Publication date: November 2, 2006
    Inventors: Makoto Inoue, Ken Tsutsui, Takashi Miyake
  • Publication number: 20060021666
    Abstract: A micro system capable of setting an appropriate amount of stimulation being applied in order to control liquid flow in a channel. The micro system comprises micro-heaters (5b, 5c) for applying stimulation to liquid flowing through liquid channels (2b, 2c) formed in a plate (1) and controlling liquid flow by the stimulation from the micro-heaters (5b, 5c), and a means for electrically controlling the amount of stimulation being applied to the liquid from the micro-heaters (5b, 5c). An appropriate amount of stimulation can be set by electrically controlling the amount of stimulation being applied to the liquid from the micro-heaters (5b, 5c) through the control means.
    Type: Application
    Filed: October 30, 2003
    Publication date: February 2, 2006
    Applicant: Waseda University
    Inventors: Takashi Funatsu, Shuichi Shoji, Yasuo Wada, Ken Tsutsui, Jun Mizuno, Yoshitaka Shirasaki
  • Publication number: 20050222697
    Abstract: A development aid device for development of a ladder program for a programmable controller has a program memory for storing the ladder program and an outline data generating part for sequentially scanning constituent elements of this stored ladder program to extract specified elements including output commands and generating outline data by assigning individual index numbers to these extracted elements sequentially in the order of their appearance on the ladder program. An outline data memory stores the generated outline data. A cross-reference data generating part generates cross-reference data by extracting commands having a same operand from the ladder program, and a cross-reference data memory stores the generated cross-reference data.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 6, 2005
    Inventors: Makoto Inoue, Ken Tsutsui, Takashi Miyake
  • Publication number: 20030132498
    Abstract: The prevention of the deterioration of the minority carrier lifetime of a semiconductor substrate can be achieved by patterning the material of an impurity diffusion protecting layer on the surface of a semiconductor substrate by a making except a thermal oxidation process of the semiconductor substrate, for example by printing and firing paste material or by depositing paste material using a mask by CVD and forming a diffusion layer in the shape of an inverted pattern of the impurity diffusion protecting layer. Also, a low-priced photovoltaic device the photo-electric conversion efficiency of which is high can be manufactured by patterning and forming them.
    Type: Application
    Filed: July 15, 2002
    Publication date: July 17, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Tsuyoshi Uematsu, Ken Tsutsui, Toshio Johge
  • Patent number: 6461947
    Abstract: To form an impurity diffusion layer on only one side of a semiconductor substrate at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is perfomed on them, or at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is performed on them and then the semiconductor substrate and the diffusion protecting plate are arranged such that those sides on which the impurity diffusion has been performed face each other and a second impurity diffusion is performed. The diffusion protecting plate may be replaced by a semiconductor substrate. The first and second impurity diffusions may be performed using an impurity of the same conductivity type.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: October 8, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Tsuyoshi Uematsu, Yoshiaki Yazawa, Hiroyuki Ohtsuka, Ken Tsutsui
  • Publication number: 20020046765
    Abstract: A photovoltaic cell produced by adhering a material for masking layer to a surface of a semiconductor substrate in pattern state to form the masking layer, and forming a dopant layer on the portion having no masking layer by gas phase diffusion or solid phase diffusion is high in photoelectric conversion efficiency and is effective for preventing lowering of minority carrier lifetime of the semiconductor substrate.
    Type: Application
    Filed: March 20, 2001
    Publication date: April 25, 2002
    Inventors: Tsuyoshi Uematsu, Yoshiaki Yazawa, Hiroyuki Ohtsuka, Ken Tsutsui
  • Patent number: 6323415
    Abstract: A light concentrator photovoltaic module includes a medium having a light receiving plane, a plurality of photovoltaic elements arranged in a spaced relationship with the light receiving plane, and a light reflecting plane for conducting light incident upon the light receiving plane but is not directly received by the photovoltaic elements to the photovoltaic elements.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: November 27, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Tsuyoshi Uematsu, Terunori Warabisako, Yoshiaki Yazawa, Yoshinori Miyamura, Ken Tsutsui, Shin-ichi Muramatsu, Hiroyuki Ohtsuka, Junko Minemura
  • Patent number: 6294723
    Abstract: Disclosed is a photovoltaic module including a plurality of concentrators each having a light-incident plane and a reflection plane, and photo detectors. Each photo detector is in contact with one of the concentrators. The module is capable of effectively trapping light and effectively generating power throughout the year even if the module is established such that sunlight at the equinoxes is made incident on the light-incident planes not in a perpendicular manner but instead obliquely, for example, in the case where the module is established in contact with a curved plane of a roof, or the like.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: September 25, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Tsuyoshi Uematsu, Terunori Warabisako, Yoshiaki Yazawa, Yoshinori Miyamura, Ken Tsutsui, Shin-ichi Muramatsu, Hiroyuki Ohtsuka, Junko Minemura
  • Publication number: 20010008144
    Abstract: Disclosed is a photovoltaic module including a plurality of concentrators each having a light-incident plane and a reflection plane, and photo detectors each being in contact with one of the concentrators, which is capable of effectively trapping light and effectively generating power throughout the year even if the module is established such that sunlight at the equinoxes is made incident on the light-incident planes not perpendicularly but obliquely from the right, upper side, for example, in the case where the module is established in contact with a curved plane of a roof or the like.
    Type: Application
    Filed: February 23, 1999
    Publication date: July 19, 2001
    Inventors: TSUYOSHI UEMATSU, TERUNORI WARABISAKO, YOSHIAKI YAZAWA, YOSHINORI MIYAMURA, KEN TSUTSUI, SHIN-ICHI MURAMATSU, HIROYUKI OHTSUKA, JUNKO MINEMURA
  • Patent number: 5889573
    Abstract: The present invention concerns an active-matrix addressed TFT substrate using a thin film transistor, a manufacturing method and an anodic oxidation method thereof, a liquid crystal display panel using the TFT substrate and a liquid crystal display equipment using the liquid crystal display panel and, more in particular, it relates to a structure and a manufacturing method which enables to improve the characteristics thereof.In the present invention, Cr or Ta is used for gate terminals, aluminum or a metal mainly composed of aluminum is used for gate bus-lines extended therefrom, gate electrodes and thin film capacitances (additional capacitance, storage capacitance) and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulation films for the intersections between the bus-lines.
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: March 30, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Yasuo Tanaka, Ken Tsutsui, Toshihisa Tsukada, Kazuo Shirahashi, Akira Sasano, Yuka Matsukawa
  • Patent number: 5719408
    Abstract: In the present invention, Cr or Ta is used for gate terminals, aluminum or a metal mainly composed of aluminum is used for gate bus-lines extended therefrom, gate electrodes and thin film capacitances (additional capacitance, storage capacitance) and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulation films for the intersections between the bus-lines. In a more preferred structure, the anodic oxidized film is used for all of the gate insulators, the dielectric films for the thin film capacitances and the interlayer insulation films for the intersections between the bus lines. The present invention also relates to a method of selectively forming an anodic oxidized film on an aluminum pattern. That is, in a case of forming a selective oxidation mask to a desired region on the aluminum pattern with a positive type photoresist, in the present invention, an angle (.theta.
    Type: Grant
    Filed: February 21, 1997
    Date of Patent: February 17, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Yasuo Tanaka, Ken Tsutsui, Toshihisa Tsukada, Kazuo Shirahashi, Akira Sasano, Yuka Matsukawa
  • Patent number: 5672523
    Abstract: The present invention concerns an active-matrix addressed TFT substrate using a thin film transistor, a manufacturing method and an anodic oxidation method thereof, a liquid crystal display panel using the TFT substrate and a liquid crystal display equipment using the liquid crystal display panel. Cr or Ta is used for gate terminals; aluminum or a metal composed mainly of aluminum is used for gate bus-lines extended therefrom, gate electrodes and thin film capacitances (additional capacitance, storage capacitance); and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulation films for the intersections between the bus-lines. In forming a selective oxidation mask to a desired region on the aluminum pattern with a positive type photoresist, for the anodic oxidation, an angle (.theta.) formed between the selective oxidation mask and the aluminum pattern is made as: .beta..gtoreq.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: September 30, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Yasuo Tanaka, Ken Tsutsui, Toshihisa Tsukada, Kazuo Shirahashi, Akira Sasano, Yuka Matsukawa
  • Patent number: 5585290
    Abstract: The present invention concerns an active-matrix addressed TFT substrate using a thin film transistor, a manufacturing method and an anodic oxidation method thereof, a liquid crystal display panel using the TFT substrate and a liquid crystal display equipment using the liquid crystal display panel and, more in particular, it relates to a structure and a manufacturing method which enables to improve the characteristics thereof. In the present invention, Cr or Ta is used for gate terminals, aluminum or a metal mainly composed of aluminum is used for gate bus-lines extended therefrom, gate electrodes and thin film capacitances (additional capacitance, storage capacitance) and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulation films for the intersections between the bus-lines.
    Type: Grant
    Filed: November 29, 1993
    Date of Patent: December 17, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Yasuo Tanaka, Ken Tsutsui, Toshihisa Tsukada, Kazuo Shirahashi, Akira Sasano, Yuka Matsukawa
  • Patent number: 5359206
    Abstract: Disclosed is an active-matrix addressed TFT substrate using a thin film transistor, a manufacturing method and an anodic oxidation method thereof, a liquid crystal display panel using the TFT substrate and a liquid crystal display equipment using the liquid crystal display panel. In the TFT substrate, Cr or Ta is used for gate terminals, aluminum or a metal mainly composed of aluminum is used for gate bus-lines extending therefrom, for gate electrodes, and for electrodes of thin film capacitors (additional capacitance, storage capacitance), and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulating films for the intersections between the bus-lines. Also disclosed is a method of selectively forming an anodic oxidized film on an aluminum pattern.
    Type: Grant
    Filed: April 15, 1991
    Date of Patent: October 25, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Haruo Matsumaru, Yasuo Tanaka, Ken Tsutsui, Toshihisa Tsukada, Kazuo Shirahashi, Akira Sasano, Yuka Matsukawa
  • Patent number: 5200634
    Abstract: A thin film phototransistor is provided having a field effect transistor structure where at least one end of the gate electrode is not overlapped with an electrode neighboring the end. Such a thin film phototransistor has: (1) a function as a photosensor and a switching function; (2) a high input impedance; (3) a voltage control function; and (4) a high photocurrent ON/OFF ratio. This thin film phototransistor can be used independently or together with a thin film transistor for picture elements of a one-dimensional or two-dimensional photosensor array, producing satisfactory results.
    Type: Grant
    Filed: December 9, 1991
    Date of Patent: April 6, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshihisa Tsukada, Yoshiyuki Kaneko, Hideaki Yamamoto, Norio Koike, Ken Tsutsui, Haruo Matsumaru, Yasuo Tanaka
  • Patent number: 5032531
    Abstract: In a first manufacturing step of an active matrix liquid-crystal panel, a transparent conductor film and a metal film are sequentially accumulated on a substrate in this order so as to form a two-layer film. The two-layer film including the transparent conductor film and the metal film is subjected to photoetching to simultaneously form at least a pixel electrode (transparent conductor film) and a gate electrode (metal film) of a thin-film transistor according to a predetermined pattern. In a fabrication process near the end of the fabrication, when the source and drain electrodes of the thin-film transistors are formed, the metal film on the pixel electrode is simultaneously removed. Since the removal of the metal film protecting the pixel electrode is simultaneously achieved at a point near the final process, protection of the pixel electrode is guaranteed, thereby realizing improvement of the yielding and reduction of the production process.
    Type: Grant
    Filed: July 7, 1989
    Date of Patent: July 16, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Ken Tsutsui, Toshihisa Tsukada, Hideaki Yamamoto, Yasuo Tanaka, Haruo Matsumaru