Patents by Inventor Ken V. Vu

Ken V. Vu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10831504
    Abstract: A method and circuit arrangement provide support for a hybrid pipeline that dynamically switches between out-of-order and in-order modes. The hybrid pipeline may selectively execute instructions from at least one instruction stream that require the high performance capabilities provided by out-of-order processing in the out-of-order mode. The hybrid pipeline may also execute instructions that have strict power requirements in the in-order mode where the in-order mode conserves more power compared to the out-of-order mode. Each stage in the hybrid pipeline may be activated and fully functional when the hybrid pipeline is in the out-of-order mode. However, stages in the hybrid pipeline not used for the in-order mode may be deactivated and bypassed by the instructions when the hybrid pipeline dynamically switches from the out-of-order mode to the in-order mode. The deactivated stages may then be reactivated when the hybrid pipeline dynamically switches from the in-order mode to the out-of-order mode.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Miguel Comparan, Andrew D. Hilton, Hans M. Jacobson, Brian M. Rogers, Robert A. Shearer, Ken V. Vu, Alfred T. Watson, III
  • Patent number: 10680892
    Abstract: Aspects of an embodiment of the invention disclose a method, computer program product, and system for managing the energy efficiency of servers providing multi-class computing services with Quality of Service (QoS) assurance. Computing resources are clustered into at least three groups, where each group has a separate power management policy (PMP). A plurality of requests are received from a plurality of devices, and are sorted into at least three service classes based on the requests' QoS criteria. Each request is assigned to one of at least three service queues based on the request's service class, and each service group is processed by a group of computing resources. The power management policies are configured such that each group of computing resources may service requests at an energy efficient point while meeting the QoS criteria of the service class.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: June 9, 2020
    Assignee: International Business Machines Corporation
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Publication number: 20190253316
    Abstract: Aspects of an embodiment of the invention disclose a method, computer program product, and system for managing the energy efficiency of servers providing multi-class computing services with Quality of Service (QoS) assurance. Computing resources are clustered into at least three groups, where each group has a separate power management policy (PMP). A plurality of requests are received from a plurality of devices, and are sorted into at least three service classes based on the requests' QoS criteria. Each request is assigned to one of at least three service queues based on the request's service class, and each service group is processed by a group of computing resources. The power management policies are configured such that each group of computing resources may service requests at an energy efficient point while meeting the QoS criteria of the service class.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Patent number: 10382267
    Abstract: Aspects of an embodiment of the invention disclose a method, computer program product, and system for managing the energy efficiency of servers providing multi-class computing services with Quality of Service (QoS) assurance. Computing resources are clustered into at least three groups, where each group has a separate power management policy (PMP). A plurality of requests are received from a plurality of devices, and are sorted into at least three service classes based on the requests' QoS criteria. Each request is assigned to one of at least three service queues based on the request's service class, and each service group is processed by a group of computing resources. The power management policies are configured such that each group of computing resources may service requests at an energy efficient point while meeting the QoS criteria of the service class.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: August 13, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Publication number: 20190034208
    Abstract: A method and circuit arrangement provide support for a hybrid pipeline that dynamically switches between out-of-order and in-order modes. The hybrid pipeline may selectively execute instructions from at least one instruction stream that require the high performance capabilities provided by out-of-order processing in the out-of-order mode. The hybrid pipeline may also execute instructions that have strict power requirements in the in-order mode where the in-order mode conserves more power compared to the out-of-order mode. Each stage in the hybrid pipeline may be activated and fully functional when the hybrid pipeline is in the out-of-order mode. However, stages in the hybrid pipeline not used for the in-order mode may be deactivated and bypassed by the instructions when the hybrid pipeline dynamically switches from the out-of-order mode to the in-order mode. The deactivated stages may then be reactivated when the hybrid pipeline dynamically switches from the in-order mode to the out-of-order mode.
    Type: Application
    Filed: October 2, 2018
    Publication date: January 31, 2019
    Inventors: Miguel Comparan, Andrew D. Hilton, Hans M. Jacobson, Brian M. Rogers, Robert A. Shearer, Ken V. Vu, Alfred T. Watson, III
  • Patent number: 10114652
    Abstract: A method and circuit arrangement provide support for a hybrid pipeline that dynamically switches between out-of-order and in-order modes. The hybrid pipeline may selectively execute instructions from at least one instruction stream that require the high performance capabilities provided by out-of-order processing in the out-of-order mode. The hybrid pipeline may also execute instructions that have strict power requirements in the in-order mode where the in-order mode conserves more power compared to the out-of-order mode. Each stage in the hybrid pipeline may be activated and fully functional when the hybrid pipeline is in the out-of-order mode. However, stages in the hybrid pipeline not used for the in-order mode may be deactivated and bypassed by the instructions when the hybrid pipeline dynamically switches from the out-of-order mode to the in-order mode. The deactivated stages may then be reactivated when the hybrid pipeline dynamically switches from the in-order mode to the out-of-order mode.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: October 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Miguel Comparan, Andrew D. Hilton, Hans M. Jacobson, Brian M. Rogers, Robert A. Shearer, Ken V. Vu, Alfred T. Watson, III
  • Patent number: 10002212
    Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: June 19, 2018
    Assignee: International Business Machines Corporation
    Inventors: Bishop Brock, Michael S. Floyd, Erika Gunadi, Nan Ni, Srinivasan Ramani, Ken V. Vu
  • Publication number: 20180139094
    Abstract: Aspects of an embodiment of the invention disclose a method, computer program product, and system for managing the energy efficiency of servers providing multi-class computing services with Quality of Service (QoS) assurance. Computing resources are clustered into at least three groups, where each group has a separate power management policy (PMP). A plurality of requests are received from a plurality of devices, and are sorted into at least three service classes based on the requests' QoS criteria. Each request is assigned to one of at least three service queues based on the request's service class, and each service group is processed by a group of computing resources. The power management policies are configured such that each group of computing resources may service requests at an energy efficient point while meeting the QoS criteria of the service class.
    Type: Application
    Filed: January 16, 2018
    Publication date: May 17, 2018
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Patent number: 9948513
    Abstract: Aspects of an embodiment of the invention disclose a method, computer program product, and system for managing the energy efficiency of servers providing multi-class computing services with Quality of Service (QoS) assurance. Computing resources are clustered into at least three groups, where each group has a separate power management policy (PMP). A plurality of requests are received from a plurality of devices, and are sorted into at least three service classes based on the requests' QoS criteria. Each request is assigned to one of at least three service queues based on the request's service class, and each service group is processed by a group of computing resources. The power management policies are configured such that each group of computing resources may service requests at an energy efficient point while meeting the QoS criteria of the service class.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: April 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Patent number: 9841998
    Abstract: A method for managing processor power optimization is provided. The method may include receiving a plurality of tasks for processing by a processor environment. The method may also include allocating a portion of a compute resource corresponding to the processor environment to each of the received plurality of tasks, the allocating of the portion being based on both an execution time and a response time associated with each of the received plurality of tasks.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: December 12, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Publication number: 20170091357
    Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.
    Type: Application
    Filed: December 13, 2016
    Publication date: March 30, 2017
    Inventors: Bishop Brock, Michael S. Floyd, Erika Gunadi, Nan Ni, Srinivasan Ramani, Ken V. Vu
  • Patent number: 9563724
    Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.
    Type: Grant
    Filed: September 28, 2013
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Bishop Brock, Michael S. Floyd, Erika Gunadi, Nan Ni, Srinivasan Ramani, Ken V. Vu
  • Patent number: 9541985
    Abstract: A mechanism is provided for optimizing energy efficiency in a set of processor cores while maintaining application performance for a set of applications. A quality of service (QoS) level is received for one or more active applications in the set of applications and state information associated with each processor core in the set of processor cores is identified. Responsive to the QoS level and the state information indicating an action to be implemented, a change is implemented to reduce power utilization by one or more processor cores in the set of processor cores in the data processing system, where the change is via at least one of dynamic frequency scaling, dynamic voltage scaling, or core folding.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: January 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Heather L. Hanson, David J. Palframan, Srinivasan Ramani, Ken V. Vu
  • Patent number: 9535486
    Abstract: A mechanism is provided for optimizing energy efficiency in a set of processor cores while maintaining application performance for a set of applications. A quality of service (QoS) level is received for one or more active applications in the set of applications and state information associated with each processor core in the set of processor cores is identified. Responsive to the QoS level and the state information indicating an action to be implemented, a change is implemented to reduce power utilization by one or more processor cores in the set of processor cores in the data processing system, where the change is via at least one of dynamic frequency scaling, dynamic voltage scaling, or core folding.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Heather L. Hanson, David J. Palframan, Srinivasan Ramani, Ken V. Vu
  • Publication number: 20160269240
    Abstract: Aspects of an embodiment of the invention disclose a method, computer program product, and system for managing the energy efficiency of servers providing multi-class computing services with Quality of Service (QoS) assurance. Computing resources are clustered into at least three groups, where each group has a separate power management policy (PMP). A plurality of requests are received from a plurality of devices, and are sorted into at least three service classes based on the requests' QoS criteria. Each request is assigned to one of at least three service queues based on the request's service class, and each service group is processed by a group of computing resources. The power management policies are configured such that each group of computing resources may service requests at an energy efficient point while meeting the QoS criteria of the service class.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 15, 2016
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Publication number: 20160224351
    Abstract: A method and circuit arrangement provide support for a hybrid pipeline that dynamically switches between out-of-order and in-order modes. The hybrid pipeline may selectively execute instructions from at least one instruction stream that require the high performance capabilities provided by out-of-order processing in the out-of-order mode. The hybrid pipeline may also execute instructions that have strict power requirements in the in-order mode where the in-order mode conserves more power compared to the out-of-order mode. Each stage in the hybrid pipeline may be activated and fully functional when the hybrid pipeline is in the out-of-order mode. However, stages in the hybrid pipeline not used for the in-order mode may be deactivated and bypassed by the instructions when the hybrid pipeline dynamically switches from the out-of-order mode to the in-order mode. The deactivated stages may then be reactivated when the hybrid pipeline dynamically switches from the in-order mode to the out-of-order mode.
    Type: Application
    Filed: April 12, 2016
    Publication date: August 4, 2016
    Inventors: Miguel Comparan, Andrew D. Hilton, Hans M. Jacobson, Brian M. Rogers, Robert A. Shearer, Ken V. Vu, Alfred T. Watson
  • Publication number: 20160196165
    Abstract: A method for managing processor power optimization is provided. The method may include receiving a plurality of tasks for processing by a processor environment. The method may also include allocating a portion of a compute resource corresponding to the processor environment to each of the received plurality of tasks, the allocating of the portion being based on both an execution time and a response time associated with each of the received plurality of tasks.
    Type: Application
    Filed: March 15, 2016
    Publication date: July 7, 2016
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Patent number: 9378069
    Abstract: A method, system and computer-usable medium are disclosed for a lock-spin-wait operation for managing multi-threaded applications in a multi-core computing environment. A target processor core, referred to as a “spin-wait core” (SWC), is assigned (or reserved) for primarily running spin-waiting threads. Threads operating in the multi-core computing environment that are identified as spin-waiting are then moved to a run queue associated with the SWC to acquire a lock. The spin-waiting threads are then allocated a lock response time that is less than the default lock response time of the operating system (OS) associated with the SWC. If a spin-waiting fails to acquire a lock within the allocated lock response time, the SWC is relinquished, ceding its availability for other spin-waiting threads in the run queue to acquire a lock. Once a spin-waiting thread acquires a lock, it is migrated to its original, or an available, processor core.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: June 28, 2016
    Assignee: International Business Machines Corporation
    Inventors: Men-Chow Chiang, Ken V. Vu
  • Patent number: 9354884
    Abstract: A method and circuit arrangement provide support for a hybrid pipeline that dynamically switches between out-of-order and in-order modes. The hybrid pipeline may selectively execute instructions from at least one instruction stream that require the high performance capabilities provided by out-of-order processing in the out-of-order mode. The hybrid pipeline may also execute instructions that have strict power requirements in the in-order mode where the in-order mode conserves more power compared to the out-of-order mode. Each stage in the hybrid pipeline may be activated and fully functional when the hybrid pipeline is in the out-of-order mode. However, stages in the hybrid pipeline not used for the in-order mode may be deactivated and bypassed by the instructions when the hybrid pipeline dynamically switches from the out-of-order mode to the in-order mode. The deactivated stages may then be reactivated when the hybrid pipeline dynamically switches from the in-order mode to the out-of-order mode.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 31, 2016
    Assignee: International Business Machines Corporation
    Inventors: Miguel Comparan, Andrew D. Hilton, Hans M. Jacobson, Brian M. Rogers, Robert A. Shearer, Ken V. Vu, Alfred T. Watson, III
  • Patent number: 9323574
    Abstract: A method for managing processor power optimization is provided. The method may include receiving a plurality of tasks for processing by a processor environment. The method may also include allocating a portion of a compute resource corresponding to the processor environment to each of the received plurality of tasks, the allocating of the portion being based on both an execution time and a response time associated with each of the received plurality of tasks.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: April 26, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Ganesh Balakrishnan, Mohammad Peyravian, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu