Patents by Inventor Ken Yasue

Ken Yasue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200047084
    Abstract: Disclosed is a separation material comprising hydrophobic polymer particles and a coating layer covering at least a portion of a surface of the hydrophobic polymer particles, wherein the coating layer comprises a hydrophilic polymer having hydroxy groups, and the hydrophilic polymer has a group represented by —NH—R-L or an epoxy group, wherein R represents a hydrocarbon group and L represents a carboxy group or an amino group.
    Type: Application
    Filed: March 29, 2018
    Publication date: February 13, 2020
    Inventors: Akiko KAWAGUCHI, Masaru WATANABE, Fumihiko KAWAUCHI, Yasushi GOTOH, Ken YASUE, Emi MIYAZAWA
  • Publication number: 20190176126
    Abstract: Disclosed is a separation material comprising: a porous polymer particle containing a crosslinked polymer containing a structural unit derived from a crosslinkable monomer having an aromatic group and two or more vinyl groups bonded to the aromatic group; and a coating layer coating at least part of the surface of the porous polymer. The coating layer contains a first graft chain that is a polymer having a hydroxyl group bonded to the crosslinked polymer, and a second graft chain that is a polymer having a hydroxyl group, bonded to the first graft chain, and being different from the first graft chain.
    Type: Application
    Filed: March 10, 2017
    Publication date: June 13, 2019
    Inventors: Masaru WATANABE, Fumihiko KAWAUCHI, Akiko KAWAGUCHI, Akihito GOTOH, Ken YASUE, Emi MIYAZAWA, Yasushi GOTOH, Michio BUTSUGAN
  • Patent number: 9041221
    Abstract: An implementing structure intermediate body including: a first chip having a first connection terminal; a second chip having a second connection terminal in a face that faces the first chip; and a film wiring substrate having a third connection terminal in one face, which is arranged between the first chip and the second chip, is loaded on a chip loading substrate having a fifth connection terminal so that another one face of the first chip is confronted thereby. In the film wiring substrate, there is a portion that is located outside any of the first chip and the second chip, at the tip part, is provided a fourth connection terminal connected to the third connection terminal by wiring, one part of the first connection terminal is connected with the second connection terminal, the third connection terminal is connected with another one part of the first connection terminal, and the fifth connection terminal is connected to the fourth connection terminal.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: May 26, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Shozo Ochi, Kazuya Ushirokawa, Keiichi Kusumoto, Takashi Yamada, Ken Yasue
  • Publication number: 20130277862
    Abstract: An implementing structure intermediate body including: a first chip having a first connection terminal; a second chip having a second connection terminal in a face that faces the first chip; and a film wiring substrate having a third connection terminal in one face, which is arranged between the first chip and the second chip, is loaded on a chip loading substrate having a fifth connection terminal so that another one face of the first chip is confronted thereby. In the film wiring substrate, there is a portion that is located outside any of the first chip and the second chip, at the tip part, is provided a fourth connection terminal connected to the third connection terminal by wiring, one part of the first connection terminal is connected with the second connection terminal, the third connection terminal is connected with another one part of the first connection terminal, and the fifth connection terminal is connected to the fourth connection terminal.
    Type: Application
    Filed: September 12, 2011
    Publication date: October 24, 2013
    Applicant: Panasonic Corporation
    Inventors: Shozo Ochi, Kazuya Ushirokawa, Keiichi Kusumoto, Takashi Yamada, Ken Yasue
  • Patent number: 6483947
    Abstract: A video signal processing apparatus processes coded data obtained by compressively coding a digitized video signal. The apparatus includes a specific component removing unit for removing specific components in the coded data. The specific component removing unit has a variable-length decoding unit for subjecting the variable-length coded data to variable-length decoding, an inverse quantization unit for inversely quantizing the processing result of the variable-length decoding unit, by using a first quantization matrix, a quantization unit for quantizing the processing result of the inverse quantization unit, by using a second quantization matrix, and a variable-length coding unit for subjecting the processing result of the quantization unit to variable-length coding. Therefore, the data quantity of the variable-length coded data can be reduced without significantly increasing the circuit scale.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: November 19, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ken Yasue, Katsuhisa Yano, Takao Kashiro, Hisaji Murata