Patents by Inventor Kendall D. Phillips

Kendall D. Phillips has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7808117
    Abstract: A pad (20) is electrically connected to a first I/O cell (14) while also physically overlying active circuitry of a second I/O cell (16). Note that although the pad (20) overlies the second I/O cell (16), the pad (20) is not electrically connected to the I/O cell (16). Such a pattern may be replicated in any desired manner so that the I/O cells (e.g. 300-310) may have a finer pitch than the corresponding pads (320-324 and 330-335). In addition, the size of the pads may be increased (e.g. pad 131 may be bigger than pad 130) while the width “c” of the I/O cells (132-135) does not have to be increased. Such a pattern (e.g. 500) may be arranged so that the area required in one or more dimensions may be minimized.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: October 5, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nhat D. Vo, Tu-Anh N. Tran, Burton J. Carpenter, Dae Y. Hong, James W. Miller, Kendall D. Phillips
  • Publication number: 20070267748
    Abstract: A pad (20) is electrically connected to a first I/O cell (14) while also physically overlying active circuitry of a second I/O cell (16). Note that although the pad (20) overlies the second I/O cell (16), the pad (20) is not electrically connected to the I/O cell (16). Such a pattern may be replicated in any desired manner so that the I/O cells (e.g. 300-310) may have a finer pitch than the corresponding pads (320-324 and 330-335). In addition, the size of the pads may be increased (e.g. pad 131 may be bigger than pad 130) while the width “c” of the I/O cells (132-135) does not have to be increased. Such a pattern (e.g. 500) may be arranged so that the area required in one or more dimensions may be minimized.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 22, 2007
    Inventors: Tu-Anh N. Tran, Nhat D. Vo, Burton J. Carpenter, Dae Y. Hong, James W. Miller, Kendall D. Phillips
  • Publication number: 20070267755
    Abstract: A pad (20) is electrically connected to a first I/O cell (14) while also physically overlying active circuitry of a second I/O cell (16). Note that although the pad (20) overlies the second I/O cell (16), the pad (20) is not electrically connected to the I/O cell (16). Such a pattern may be replicated in any desired manner so that the I/O cells (e.g. 300-310) may have a finer pitch than the corresponding pads (320-324 and 330-335). In addition, the size of the pads may be increased (e.g. pad 131 may be bigger than pad 130) while the width “c” of the I/O cells (132-135) does not have to be increased. Such a pattern (e.g. 500) may be arranged so that the area required in one or more dimensions may be minimized.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 22, 2007
    Inventors: Nhat D. Vo, Tu-Anh T. Tran, Burton J. Carpenter, Dae Y. Hong, James W. Miller, Kendall D. Phillips