Patents by Inventor Kendall S. Wills
Kendall S. Wills has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100127344Abstract: An apparatus and method for providing a reliable connection to an internal node from the backside of an integrated circuit using focused ion beam (“FIB”) milling are disclosed herein. In accordance with at least some embodiments, an integrated circuit includes an isolation region, an active region, a first contact, and a metal layer. The isolation region separates adjacent integrated circuit devices. The first contact is disposed between the isolation region and the metal layer. The first contact is electrically connected to the active region. A dummy structure is disposed between the isolation region and the first contact. A FIB via is milled through the isolation region and the dummy structure to the first contact to establish an electrical connection with active region through the via.Type: ApplicationFiled: November 21, 2008Publication date: May 27, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Kendall S. WILLS, Reena A. CHANPURA
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Publication number: 20100127723Abstract: A system and method for reliably probing an internal node from the backside of an integrated circuit are disclosed herein. In accordance with at least some embodiments, an integrated circuit includes a device that outputs a signal, and a probe structure. The probe structure includes a transistor having each terminal of the transistor connected to all other terminals of the transistor and connected to the device output. The device output signal is applied to each terminal of the transistor.Type: ApplicationFiled: November 21, 2008Publication date: May 27, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Rand B. CARAWAN, Kendall S. WILLS, Reena A. CHANPURA
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Patent number: 7313490Abstract: In one embodiment, a method for wavelet analysis of one or more time domain reflectometry (TDR) signals to determine one or more characteristics of one or more anomalies in a wire includes receiving a TDR signal that has reflected back up a wire from an anomaly in the wire, calculating a wavelet analysis result from a wavelet analysis of the TDR signal, accessing a library of one or more reference wavelet analysis results that each correspond to one or more known anomalies having one or more known characteristics, and comparing the wavelet analysis result with one or more reference wavelet analysis results. If the wavelet analysis result corresponds to one or more particular reference wavelet analysis results, it is indicated that the anomaly in the wire has one or more particular known characteristics of one or more particular known anomalies corresponding to the one or more particular reference wavelet analysis results.Type: GrantFiled: December 31, 2003Date of Patent: December 25, 2007Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Kartik Ramanujachar, Michael D. Dockins
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Patent number: 7130749Abstract: In one embodiment, a method for wavelet analysis of one or more signals to determine one or more characteristics of one or more anomalies in a wire includes receiving a first signal from a detector that has scanned a magnetic field from a wire including an anomaly. The first signal corresponds to a second signal used to generate the magnetic field. The method includes calculating a wavelet analysis result from a wavelet analysis of the first signal. The wavelet analysis result corresponds to the second signal. The method includes accessing a library of one or more reference wavelet analysis results that each correspond to one or more known anomalies having one or more known characteristics and comparing the wavelet analysis result with one or more reference wavelet analysis results.Type: GrantFiled: December 31, 2003Date of Patent: October 31, 2006Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Kartik Ramanujachar
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Patent number: 6521479Abstract: The present invention provides a system and method for preparing semiconductor integrated circuits (“ICs”), particularly ball grid arrays (“BGAs”), quad flat packs (“QFPs”) and dual in line packages (“DIPs”) for failure analysis (“FA”) using a variety of techniques, including emission microscopy (“EM”) and externally induced voltage alteration (“XIVA”). This system and method requires precision thinning and polishing of the semiconductor IC device to expose the backside of the die and mounting of the semiconductor device on a secondary package assembly.Type: GrantFiled: January 11, 2002Date of Patent: February 18, 2003Assignee: Texas Instruments IncorporatedInventors: Ray D. Harrison, Jianbai Zhu, Kendall S. Wills, Willmar Subido
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Patent number: 5605863Abstract: A process for manufacturing device or die is presented which uses laser deposited leads, with a filler to bridge the gap between the die and the lead frame. The filler may be oxide, poly amide, a combination of oxide layers and poly amide layers, plastic or a plastic which has plastic coated beads of metal. The die and lead frame are placed on a heat spreader. Leads are formed over the filler material from bond pads on the lead frame to bond pads on the die. Various protective materials are placed over the die to protect it from the package. Over the protective material is another heat spreader or other device that is required to make the die function better. Typical devices are batteries, capacitors, or other die. Finally, the structure is encapsulated in a package of non-conductive material.Type: GrantFiled: June 7, 1995Date of Patent: February 25, 1997Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez
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Patent number: 5543365Abstract: A channel is formed in a wafer to fore descrite die. A portion of the wafer is heated in the channel. A portion of the heated portion is cooled to eliminate the uniform structure. The cooled portion is scribed to separate the die.Type: GrantFiled: December 2, 1994Date of Patent: August 6, 1996Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez, Melvin Brewer
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Patent number: 5451550Abstract: A semiconductor die is enveloped by an ambient gas that will react to the presence of a particular wave length of light. A laser beam is focused on the edge of the die to deposit a dielectric coating. The laser beam or the die is rotated until the dielectric coating covers the entire die edge. The dielectric coating acts as a seal that is impervious to water and other contamination that can reduce the die reliability. The dielectric coating also electrically insulates the die from its surroundings.Type: GrantFiled: February 20, 1991Date of Patent: September 19, 1995Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez
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Patent number: 5406116Abstract: A layer of dopant is implanted in the passivation of a semiconductor die to facilitate testing of the die by a scanning electron microscope voltage contrast system. The layer of dopant is capacitively coupled to circuits under the passivation and is coupled to ground to allow charge to bleed to ground through a high resistivity path. The resistivity is low enough to allow E-beam charge bleed off, but not bleed off of higher frequency capacitive coupled signals. The disclosure is also applicable to photo generated electron voltage contrast.Type: GrantFiled: December 6, 1993Date of Patent: April 11, 1995Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, John S. Bartlett, Thomas J. Aton, David E. Littlefield
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Patent number: 5317186Abstract: A ring of polycrystalline material is developed around the edge of a wafer by general heating of the wafer and localized heating with a laser beam followed by rapid cooling. The ring of polycrystalline material helps prevent wafer breakage due to thermal shock. One or more additional ring, loop or closed figures of polycrystalline material can be formed inside of said ring of polycrystalline material developed around the edge of the wafer to further reinforce the wafer.Type: GrantFiled: June 15, 1992Date of Patent: May 31, 1994Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez, Melvin L. Brewer
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Patent number: 5149675Abstract: A ring of polycrystalline material is developed around the edge of a wafer by general heating of the wafer and localized heating with a laser beam followed by rapid cooling. The ring of polycrystalline material helps prevent wafer breakage due to thermal shock. One or more additonal ring, loop or closed figures of polycrystalline material can be formed inside of said ring of polycrystalline material developed around the edge of the wafer to further reinforce the wafer.Type: GrantFiled: December 31, 1990Date of Patent: September 22, 1992Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez, Melvin L. Brewer
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Patent number: 5119451Abstract: Optical waveguides are used to bridge between integrated circuits on different die. The waveguide is suspended on polyamid or some other material. An optional waveguide is built which can have both active components or passive components and beam dumps. The optical waveguides allow the signal from one integrated circuit to another to travel at the speed of light. Such waveguides can be direct deposited to better than 0.2 micron accuracy to connect submicron waveguides on the integrated circuit. The use of conductive waveguides or conductive coatings to encapsulate the waveguide allows electrical signals to be passed along with the optical signal.Type: GrantFiled: December 31, 1990Date of Patent: June 2, 1992Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez
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Patent number: 5008729Abstract: A semiconductor device is programmed by a laser beam which causes a PN junction in a silicon substrate to be permanently altered. This produces a leakage path between a program node and a tank region in the substrate; the program node can be an input to a transistor in a CMOS circuit, for example, so this node will always hold the transistor on or off depending whether or not it has been laser-programmed. Preferably, the tank region is of opposite type compared to the substrate, so the program node is electrically isolated from the substrate in either case.Type: GrantFiled: September 28, 1989Date of Patent: April 16, 1991Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez
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Patent number: 5006916Abstract: A contact and interconnect for an MOS VLSI semiconductor device employs a contact hole in an insulator coating; the contact hole has vertical instead of sloped sidewalls. A first metallization is applied by CVD so that the sidewalls will be coated to a uniform thickness, then this first metal is anisotropicalloy etched to leave metal sidewalls. A second metallization is applied by sputtering or evaporation, which provides a more dense and electromigration-resistant coating. A refractory metal layer may be interposed between the metallization and the silicon substrate, and also between the metal interconnect and the insulator, since the insulator usually contains phosphorus.Type: GrantFiled: August 3, 1987Date of Patent: April 9, 1991Assignee: Texas Instruments IncorporatedInventor: Kendall S. Wills
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Patent number: 4912066Abstract: A semiconductor device is programmed by a laser beam which causes an insulator between two conductors on a silicon substrate to be permanently altered, as by breakdown of the insulator. The conductors may be metals such as aluminum or tungsten, and the insulator is a layer of deposited or thermal silicon oxide. The breakdown may be enhanced by voltage applied between the conductors while the laser beam is focused on the structure.Type: GrantFiled: March 7, 1988Date of Patent: March 27, 1990Assignee: Texas Instruments IncorporatedInventor: Kendall S. Wills
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Patent number: 4751197Abstract: A semiconductor device is programmed by a laser beam which causes an insulator between two conductors on a silicon substrate to be permanently altered, as by breakdown of the insulator. The conductors may be metals such as aluminum or tungsten, and the insulator is a layer of deposited or thermal silicon oxide. The breakdown may be enhanced by voltage applied between the conductors while the laser beam is focused on the structure.Type: GrantFiled: September 24, 1986Date of Patent: June 14, 1988Assignee: Texas Instruments IncorporatedInventor: Kendall S. Wills
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Patent number: 4720908Abstract: A contact and interconnect for an MOS VLSI semiconductor device employs a contact hole in an insulator coating; the contact hole has vertical instead of sloped sidewalls. A first metallization is applied by CVD so that the sidewalls will be coated to a uniform thickness, then this first metal is anisotropically etched to leave metal sidewalls. A second metallization is applied by sputtering or evaporation, which provides a more dense and electromigration-resistant coating. A refractory metal layer may be interposed between the metallization and the silicon substrate, and also between the metal interconnect and the insulator, since the insulator usually contains phosphorus.Type: GrantFiled: July 11, 1984Date of Patent: January 26, 1988Assignee: Texas Instruments IncorporatedInventor: Kendall S. Wills
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Patent number: 4623403Abstract: A target for a laser beam consists of a plurality of closely spaced lines that causes the generation of an readily-identifiable read-out so that the laser beam can be indexed when performing laser scribing for redundant memory devices or the like.Type: GrantFiled: June 15, 1984Date of Patent: November 18, 1986Assignee: Texas Instruments IncorporatedInventors: Kendall S. Wills, Paul A. Rodriguez
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Patent number: 4135077Abstract: Apparatus for heating the outer surface of an object such as a loaf of bread. The object is conveyed through a heating chamber which has a plurality of apertures therein. A plurality of laser beams of a wavelength that is readily absorbed by the outer surface of the object are generated and each beam is directed through a respective aperture in the chamber. Each beam entering the chamber is diverged to scatter the beam and spread the energy contained therein out over a wider area than that in which the energy is initially contained. The divergent beams are directed into a predetermined zone within the chamber through which the object must pass and the laser radiation within the zone strikes the outer surface of the object and is absorbed thereby to heat the outer surface.Type: GrantFiled: September 16, 1976Date of Patent: January 16, 1979Inventor: Kendall S. Wills