Patents by Inventor Keng-Meng Chang
Keng-Meng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230396215Abstract: A reconfigurable crystal oscillator and a method for reconfiguring a crystal oscillator are provided. The reconfigurable crystal oscillator includes a transconductance circuit, a feedback resistor, a crystal tank, an input-end capacitor and an output-end capacitor. Both of the feedback resistor and the crystal tank are coupled between an input terminal and an output terminal of the transconductance circuit. The input-end capacitor is coupled to the input terminal of the transconductance circuit, and the output-end capacitor is coupled to the output terminal of the transconductance circuit. In particular, the transconductance circuit is configured to provide a transconductance, and when an operation mode of the reconfigurable crystal oscillator is switched, an input-end capacitance of the input-end capacitor and an output-end capacitance of the output-end capacitor are switched, respectively.Type: ApplicationFiled: December 25, 2022Publication date: December 7, 2023Applicant: MEDIATEK INC.Inventors: Keng-Meng Chang, Sen-You Liu, Yao-Chi Wang
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Patent number: 11671056Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. For example, the specific voltage range is determined according to a second voltage level.Type: GrantFiled: March 14, 2022Date of Patent: June 6, 2023Assignee: MEDIATEK INC.Inventors: Sen-You Liu, Chien-Wei Chen, Keng-Meng Chang, Yao-Chi Wang
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Patent number: 11606063Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator includes a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may provide an alternating current (AC) ground path for noise on the bias voltage according to a reset pulse, wherein a position of the reset pulse is set by a control voltage on a control terminal of the phase noise reduction circuit.Type: GrantFiled: March 16, 2022Date of Patent: March 14, 2023Assignee: MEDIATEK INC.Inventors: Chien-Wei Chen, Yu-Li Hsueh, Keng-Meng Chang, Yao-Chi Wang
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Patent number: 11387781Abstract: A fast start-up crystal oscillator (XO) and a fast start-up method thereof are provided. The fast start-up XO may include a XO core circuit, a frequency synthesizer, and a fast start-up interfacing circuit, wherein the frequency synthesizer may include a voltage control oscillator (VCO) and a divider. The XO core circuit generates a XO signal having a XO frequency. The VCO generates a VCO clock having a VCO frequency, and the divider generates a divided clock having a divided frequency, wherein the VCO frequency is divided by a divisor of the divider to obtain the divided frequency. The fast start-up interfacing circuit transmits the divided clock to the XO core circuit, and then generates a reference clock having the XO frequency according to the XO signal. More particularly, the VCO frequency is calibrated according to the reference clock, in order to make the divided frequency approach the XO frequency.Type: GrantFiled: August 5, 2021Date of Patent: July 12, 2022Assignee: MEDIATEK INC.Inventors: Keng-Meng Chang, Yao-Chi Wang, Yanjie Mo, Sen-You Liu, Chun-Ming Lin
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Publication number: 20220209714Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. For example, the specific voltage range is determined according to a second voltage level.Type: ApplicationFiled: March 14, 2022Publication date: June 30, 2022Applicant: MEDIATEK INC.Inventors: Sen-You Liu, Chien-Wei Chen, Keng-Meng Chang, Yao-Chi Wang
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Publication number: 20220209715Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator includes a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may provide an alternating current (AC) ground path for noise on the bias voltage according to a reset pulse, wherein a position of the reset pulse is set by a control voltage on a control terminal of the phase noise reduction circuit.Type: ApplicationFiled: March 16, 2022Publication date: June 30, 2022Applicant: MEDIATEK INC.Inventors: Chien-Wei Chen, Yu-Li Hsueh, Keng-Meng Chang, Yao-Chi Wang
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Patent number: 11342884Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may generate a reset signal including at least one reset pulse for resetting the bias voltage. In addition, the reset signal is generated without calibrating the at least one reset pulse to a zero-crossing point of the sinusoidal wave.Type: GrantFiled: May 4, 2021Date of Patent: May 24, 2022Assignee: MEDIATEK INC.Inventors: Chien-Wei Chen, Yu-Li Hsueh, Keng-Meng Chang, Yao-Chi Wang
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Patent number: 11309835Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range.Type: GrantFiled: May 4, 2021Date of Patent: April 19, 2022Assignee: MEDIATEK INC.Inventors: Sen-You Liu, Chien-Wei Chen, Keng-Meng Chang, Yao-Chi Wang
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Publication number: 20220069772Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may generate a reset signal including at least one reset pulse for resetting the bias voltage. In addition, the reset signal is generated without calibrating the at least one reset pulse to a zero-crossing point of the sinusoidal wave.Type: ApplicationFiled: May 4, 2021Publication date: March 3, 2022Inventors: Chien-Wei Chen, Yu-Li Hsueh, Keng-Meng Chang, Yao-Chi Wang
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Publication number: 20220069773Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range.Type: ApplicationFiled: May 4, 2021Publication date: March 3, 2022Inventors: Sen-You Liu, Chien-Wei Chen, Keng-Meng Chang, Yao-Chi Wang
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Patent number: 10826429Abstract: A compensation module, an oscillation circuit and associated compensation method for reducing an oscillation frequency variation in an output oscillation signal of a voltage-controlled oscillator (VCO) core are provided. The compensation module includes a compensation circuit and a polarity selection circuit. The compensation circuit has a capacitance value related to voltages of a first and a second receiving terminals. The oscillation frequency variation is changed with the capacitance value. The polarity selection circuit conducts a periodic regulated signal to one of the first receiving terminal and the second receiving terminal. The polarity selection circuit conducts a filtered bias signal to the other of the first receiving terminal and the second receiving terminal. The periodic regulated signal is sensitive to a regulated voltage variation, and the filtered bias signal is insensitive to the regulated voltage variation.Type: GrantFiled: October 29, 2018Date of Patent: November 3, 2020Assignee: MEDIATEK INC.Inventors: Keng-Meng Chang, Yun-Chen Chuang, Yao-Chi Wang
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Publication number: 20190165730Abstract: A compensation module, an oscillation circuit and associated compensation method for reducing an oscillation frequency variation in an output oscillation signal of a voltage-controlled oscillator (VCO) core are provided. The compensation module includes a compensation circuit and a polarity selection circuit. The compensation circuit has a capacitance value related to voltages of a first and a second receiving terminals. The oscillation frequency variation is changed with the capacitance value. The polarity selection circuit conducts a periodic regulated signal to one of the first receiving terminal and the second receiving terminal. The polarity selection circuit conducts a filtered bias signal to the other of the first receiving terminal and the second receiving terminal. The periodic regulated signal is sensitive to a regulated voltage variation, and the filtered bias signal is insensitive to the regulated voltage variation.Type: ApplicationFiled: October 29, 2018Publication date: May 30, 2019Inventors: Keng-Meng CHANG, Yun-Chen CHUANG, Yao-Chi WANG
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Patent number: 9906209Abstract: A biased impedance circuit, an impedance adjustment circuit, and an associated signal generator are provided. The biased impedance circuit is coupled to a summation node and applies a biased impedance to the summation node. A periodic input signal is received at the summation node. The biased impedance circuit includes a switching circuit for receiving an output window signal, wherein a period of the output window signal is shorter than a period of the periodic input signal. The switching circuit includes a low impedance path and a high impedance path. The low impedance sets the biased impedance to a first impedance when the output window signal is at a first voltage level. The high impedance path sets the biased impedance to a second impedance when the output window signal is at a second voltage level. The first impedance is less than the second impedance.Type: GrantFiled: April 27, 2017Date of Patent: February 27, 2018Assignee: MEDIATEK INC.Inventors: Keng-Meng Chang, Yao-Chi Wang
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Publication number: 20170346464Abstract: A biased impedance circuit, an impedance adjustment circuit, and an associated signal generator are provided. The biased impedance circuit is coupled to a summation node and applies a biased impedance to the summation node. A periodic input signal is received at the summation node. The biased impedance circuit includes a switching circuit for receiving an output window signal, wherein a period of the output window signal is shorter than a period of the periodic input signal. The switching circuit includes a low impedance path and a high impedance path. The low impedance sets the biased impedance to a first impedance when the output window signal is at a first voltage level. The high impedance path sets the biased impedance to a second impedance when the output window signal is at a second voltage level. The first impedance is less than the second impedance.Type: ApplicationFiled: April 27, 2017Publication date: November 30, 2017Inventors: Keng-Meng Chang, Yao-Chi Wang
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Patent number: 9391562Abstract: A local oscillation generator includes a multi-phase circuit and a multiplexer. The multi-phase oscillator provides a plurality of multi-phase oscillation signals of a same frequency and different phases. The multiplexer conducts one of the multi-phase oscillation signals to an output end in different time slots to provide an output oscillation signal. The frequency of the multi-phase oscillation signals is the same as a fundamental frequency, and the frequency of the output oscillation signal is different from the fundamental frequency. Thus, the local oscillation generator provides a local oscillation signal according to the output oscillation signal such that the fundamental frequency is different from the frequency of the local oscillation signal.Type: GrantFiled: September 27, 2013Date of Patent: July 12, 2016Assignee: MSTAR SEMICONDUCTOR, INC.Inventors: Chih-Ming Hung, Keng-Meng Chang, Yao-Chi Wang, Chih-Wei Chang
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Patent number: 9300507Abstract: A local oscillation generator includes an oscillation circuit, a frequency multiplication circuit, a mixer, and a frequency divider. The oscillation circuit provides a fundamental oscillation signal. The frequency multiplication circuit provides a first oscillation signal according to the fundamental oscillation signal. The mixer provides a mixed oscillation signal according to mixing of the fundamental oscillation signal and the first oscillation signal. The frequency divider frequency divides the mixed oscillation signal so that the local oscillation generator accordingly provides a local oscillation signal.Type: GrantFiled: July 12, 2013Date of Patent: March 29, 2016Assignee: MSTAR SEMICONDUCTOR, INC.Inventors: Keng-Meng Chang, Yao-Chi Wang
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Publication number: 20140092892Abstract: A local oscillation generator includes a multi-phase circuit and a multiplexer. The multi-phase oscillator provides a plurality of multi-phase oscillation signals of a same frequency and different phases. The multiplexer conducts one of the multi-phase oscillation signals to an output end in different time slots to provide an output oscillation signal. The frequency of the multi-phase oscillation signals is the same as a fundamental frequency, and the frequency of the output oscillation signal is different from the fundamental frequency. Thus, the local oscillation generator provides a local oscillation signal according to the output oscillation signal such that the fundamental frequency is different from the frequency of the local oscillation signal.Type: ApplicationFiled: September 27, 2013Publication date: April 3, 2014Applicant: MStar Semiconductor, Inc.Inventors: Chih-Ming Hung, Keng-Meng Chang, Yao-Chi Wang, Chih-Wei Chang
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Publication number: 20140029690Abstract: A local oscillation generator includes an oscillation circuit, a frequency multiplication circuit, a mixer, and a frequency divider. The oscillation circuit provides a fundamental oscillation signal. The frequency multiplication circuit provides a first oscillation signal according to the fundamental oscillation signal. The mixer provides a mixed oscillation signal according to mixing of the fundamental oscillation signal and the first oscillation signal. The frequency divider frequency divides the mixed oscillation signal so that the local oscillation generator accordingly provides a local oscillation signal.Type: ApplicationFiled: July 12, 2013Publication date: January 30, 2014Inventors: Keng-Meng Chang, Yao-Chi Wang