Patents by Inventor Kengo Akimoto

Kengo Akimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10756080
    Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 25, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
  • Patent number: 10744146
    Abstract: The object of the present invention is to provide a composition that has preventive or ameliorative action on symptoms or diseases caused by decreased brain function. This composition contains, as its active ingredient, arachidonic acid and/or a compound having arachidonic acid as a constituent fatty acid and, particularly, an alcohol ester of arachidonic acid or a triglyceride, phospholipid or glycolipid in which all or a portion of the constituent fatty acids are arachidonic acid.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: August 18, 2020
    Assignee: SUNTORY HOLDINGS LIMITED
    Inventors: Kengo Akimoto, Hiroshi Kawashima, Yoshiko Ono, Hiroshige Okaichi, Youko Okaichi
  • Publication number: 20200259019
    Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+?Ga1-?O3(ZnO)m (0<?<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by InxGayO3(ZnO)m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).
    Type: Application
    Filed: May 1, 2020
    Publication date: August 13, 2020
    Inventors: Masahiro TAKAHASHI, Kengo AKIMOTO, Shunpei YAMAZAKI
  • Patent number: 10734530
    Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: August 4, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Publication number: 20200243654
    Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Daisuke Kawae
  • Publication number: 20200219904
    Abstract: A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is faulted using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over the oxide semiconductor layer serving as a channel formation region which is overlapped with the gate electrode. The driver circuit as well as the pixel portion is provided over the same substrate to reduce manufacturing costs.
    Type: Application
    Filed: March 19, 2020
    Publication date: July 9, 2020
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Atsushi UMEZAKI
  • Patent number: 10700215
    Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: June 30, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Kengo Akimoto, Masashi Tsubuku, Toshinari Sasaki
  • Publication number: 20200194466
    Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.
    Type: Application
    Filed: February 20, 2020
    Publication date: June 18, 2020
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Atsushi UMEZAKI
  • Patent number: 10685985
    Abstract: A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over the oxide semiconductor layer serving as a channel formation region which is overlapped with the gate electrode. The driver circuit as well as the pixel portion is provided over the same substrate to reduce manufacturing costs.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: June 16, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Atsushi Umezaki
  • Publication number: 20200176606
    Abstract: To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Akiharu MIYANAGA, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Patent number: 10665684
    Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: May 26, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Daisuke Kawae
  • Patent number: 10644164
    Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+?Ga1??O3(ZnO)m (0<?<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by InxGayO3(ZnO)m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: May 5, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiro Takahashi, Kengo Akimoto, Shunpei Yamazaki
  • Patent number: 10629627
    Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transimitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: April 21, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masayuki Sakakura, Yoshiaki Oikawa, Shunpei Yamazaki, Junichiro Sakata, Masashi Tsubuku, Kengo Akimoto, Miyuki Hosoba
  • Publication number: 20200111816
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
  • Publication number: 20200091202
    Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
    Type: Application
    Filed: November 21, 2019
    Publication date: March 19, 2020
    Inventors: Shunpei YAMAZAKI, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
  • Patent number: 10593811
    Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: March 17, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 10585506
    Abstract: A display device having high visibility regardless of illuminance of external light is provided. A display device with reduced power consumption is provided. The display device includes a first light-receiving circuit including a first light-receiving element; and a pixel circuit including a display element. The first light-receiving circuit and the pixel circuit are formed over the same substrate. The gray level of the display element is changed according to a change in the amount of light to which the first light-receiving element is exposed. In particular, the gray level of the display element is decreased with a decrease in the amount of light exposure.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: March 10, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukinori Shima, Kengo Akimoto, Yuki Okamoto
  • Patent number: 10586869
    Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: March 10, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yusuke Nonaka, Takayuki Inoue, Masashi Tsubuku, Kengo Akimoto, Akiharu Miyanaga
  • Publication number: 20200066918
    Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.
    Type: Application
    Filed: October 29, 2019
    Publication date: February 27, 2020
    Inventors: Hajime KIMURA, Kengo AKIMOTO, Masashi TSUBUKU, Toshinari SASAKI
  • Publication number: 20200066761
    Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Masayuki SAKAKURA, Yoshiaki OIKAWA, Shunpei YAMAZAKI, Junichiro SAKATA, Masashi TSUBUKU, Kengo AKIMOTO, Miyuki HOSOBA