Patents by Inventor Kengo Akimoto

Kengo Akimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12142080
    Abstract: A data processing system that can sense fatigue or the like using a neural network is provided. First, a reference image is obtained on the basis of first to n-th images (n is an integer greater than or equal to 2). Next, the first to n-th images and the reference image are input to an input layer of a neural network, first to n-th estimated ages and a reference estimated age are output from an output layer, and first to n-th data and reference data are output from an intermediate layer. After that, first to n-th coordinates are obtained in each of which an x-coordinate is a value corresponding to a difference between the reference estimated age and the first to n-th estimated ages and a y-coordinate is a value corresponding to the degree of similarity between the reference data and the first to n-th data.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: November 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Okano, Teppei Oguni, Kengo Akimoto
  • Publication number: 20240371985
    Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
    Type: Application
    Filed: July 18, 2024
    Publication date: November 7, 2024
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Publication number: 20240363639
    Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.
    Type: Application
    Filed: July 9, 2024
    Publication date: October 31, 2024
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Tomoya FUTAMURA, Takahiro KASAHARA
  • Publication number: 20240321903
    Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.
    Type: Application
    Filed: May 30, 2024
    Publication date: September 26, 2024
    Inventors: Masayuki SAKAKURA, Yoshiaki OIKAWA, Shunpei YAMAZAKI, Junichiro SAKATA, Masashi TSUBUKU, Kengo AKIMOTO, Miyuki HOSOBA
  • Patent number: 12094884
    Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: September 17, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Atsushi Umezaki
  • Patent number: 12074210
    Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: August 27, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 12068329
    Abstract: An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: August 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Akiharu Miyanaga, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 12061644
    Abstract: An image retrieval system with high retrieval accuracy is provided. The image retrieval system includes a database and a processing portion. The database has a function of storing a plurality of pieces of database image data, and a database tag is linked to each of the plurality of pieces of database image data. The processing portion has a function of obtaining database image feature value data representing a feature value of the database image data for each piece of the database image data. The processing portion has a function of obtaining query image feature value data representing a feature value of the query image data. The processing portion has a function of calculating first similarity of the database image data to the query image data for each piece of the database image data. The processing portion has a function of obtaining a query tag linked to the query image data using some of the database tags.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Shigeru Tamaki, Kunitaka Yamamoto, Isamu Shigemori
  • Publication number: 20240257422
    Abstract: Text is generated from an object. Text is generated from a first object. The first object includes a second object and a third object. A step of detecting coordinate data of the second object is included. A step of detecting coordinate data of the third object is included. A step of extracting positional relation between the second object and the third object from coordinate data is included. A step of converting the extracted positional relation into graph data is included. A step of generating text about the positional relation between the second object and the third object from graph data is included.
    Type: Application
    Filed: January 26, 2024
    Publication date: August 1, 2024
    Inventors: Kengo AKIMOTO, Junpei MOMO, Takahiro FUKUTOME
  • Publication number: 20240234581
    Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.
    Type: Application
    Filed: February 21, 2024
    Publication date: July 11, 2024
    Inventors: Hajime KIMURA, Kengo AKIMOTO, Masashi TSUBUKU, Toshinari SASAKI
  • Patent number: 12034064
    Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: July 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Publication number: 20240186151
    Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.
    Type: Application
    Filed: February 7, 2024
    Publication date: June 6, 2024
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Masashi TSUBUKU, Kengo AKIMOTO, Miyuki HOSOBA, Masayuki SAKAKURA, Yoshiaki OIKAWA
  • Patent number: 12002818
    Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: June 4, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masayuki Sakakura, Yoshiaki Oikawa, Shunpei Yamazaki, Junichiro Sakata, Masashi Tsubuku, Kengo Akimoto, Miyuki Hosoba
  • Publication number: 20240162351
    Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: May 16, 2024
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO
  • Publication number: 20240145599
    Abstract: To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Akiharu MIYANAGA, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Patent number: 11935965
    Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Kengo Akimoto, Masashi Tsubuku, Toshinari Sasaki
  • Publication number: 20240079499
    Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+?Ga1??O3(ZnO)m (0<?<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by InxGayO3(ZnO)m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).
    Type: Application
    Filed: October 19, 2023
    Publication date: March 7, 2024
    Inventors: Masahiro TAKAHASHI, Kengo AKIMOTO, Shunpei YAMAZAKI
  • Patent number: 11922549
    Abstract: Text is generated from an object. Text is generated from a first object. The first object includes a second object and a third object. A step of detecting coordinate data of the second object is included. A step of detecting coordinate data of the third object is included. A step of extracting positional relation between the second object and the third object from coordinate data is included. A step of converting the extracted positional relation into graph data is included. A step of generating text about the positional relation between the second object and the third object from graph data is included.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Junpei Momo, Takahiro Fukutome
  • Patent number: 11923206
    Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Masashi Tsubuku, Kengo Akimoto, Miyuki Hosoba, Masayuki Sakakura, Yoshiaki Oikawa
  • Patent number: 11924589
    Abstract: Color filters are used for color images obtained using imaging devices such as conventional image sensors. Imaging elements with color filters are sold, and an appropriate combination of the imaging element and a lens or the like is incorporated in an electronic device. Only providing a color filter to overlap a light-receiving region of an image sensor reduces the amount of light reaching the light-receiving region. An imaging system of the present invention includes a solid-state imaging element without a color filter, a storage device, and a learning device. As a selection standard for reducing the amount of learning data, in an HSV color space, saturation is used, and selection is performed so that the saturation has optimal distribution. When colorization disclosed in this specification is performed, the colorization and object highlight processing can be performed at the same time.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Seiko Inoue, Daichi Mishima