Patents by Inventor Kengo Akimoto
Kengo Akimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9117919Abstract: An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (?-Al2O3, ?-Ga2O3, In2O3, Ti2O3, V2O3, Cr2O3, or ?-Fe2O3) is used.Type: GrantFiled: May 15, 2014Date of Patent: August 25, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yusuke Nonaka, Takayuki Inoue, Masashi Tsubuku, Kengo Akimoto, Akiharu Miyanaga
-
Publication number: 20150236054Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.Type: ApplicationFiled: April 30, 2015Publication date: August 20, 2015Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Tomoya FUTAMURA, Takahiro KASAHARA
-
Publication number: 20150236007Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.Type: ApplicationFiled: April 30, 2015Publication date: August 20, 2015Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Tomoya FUTAMURA, Takahiro KASAHARA
-
Patent number: 9111804Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.Type: GrantFiled: January 10, 2012Date of Patent: August 18, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
-
Patent number: 9112038Abstract: An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.Type: GrantFiled: May 20, 2014Date of Patent: August 18, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideaki Kuwabara, Kengo Akimoto, Toshinari Sasaki
-
Patent number: 9105659Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.Type: GrantFiled: July 17, 2014Date of Patent: August 11, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Akiharu Miyanaga, Kengo Akimoto, Kojiro Shiraishi
-
Patent number: 9105668Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.Type: GrantFiled: October 7, 2014Date of Patent: August 11, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yusuke Nonaka, Takayuki Inoue, Masashi Tsubuku, Kengo Akimoto, Akiharu Miyanaga
-
Publication number: 20150221778Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.Type: ApplicationFiled: April 2, 2015Publication date: August 6, 2015Inventors: Hidekazu MIYAIRI, Takeshi OSADA, Kengo AKIMOTO, Shunpei YAMAZAKI
-
Patent number: 9099562Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.Type: GrantFiled: August 17, 2009Date of Patent: August 4, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kengo Akimoto, Tatsuya Honda, Norihito Sone
-
Publication number: 20150214383Abstract: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.Type: ApplicationFiled: April 6, 2015Publication date: July 30, 2015Inventors: Hiromichi GODO, Kengo AKIMOTO, Shunpei YAMAZAKI
-
Patent number: 9087744Abstract: When a positive bias voltage is applied to a gate electrode of a transistor including an oxide semiconductor for longer than or equal to 10 msec, electric characteristics of the transistor, which have varied due to the light irradiation, can be brought to the state which is substantially the same as the state before the light irradiation. Note that a positive bias voltage is applied to the gate electrode of the transistor at an appropriate timing with reference to the amount of incident light received by the transistor. Accordingly, a display device in which a reduction in display quality is suppressed even when light irradiation is performed can be realized.Type: GrantFiled: October 27, 2011Date of Patent: July 21, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Kengo Akimoto
-
Patent number: 9087745Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.Type: GrantFiled: January 9, 2012Date of Patent: July 21, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
-
Patent number: 9082857Abstract: A thin film transistor structure in which a source electrode and a drain electrode formed from a metal material are in direct contact with an oxide semiconductor film may lead to high contact resistance. One cause of high contact resistance is that a Schottky junction is formed at a contact plane between the source and drain electrodes and the oxide semiconductor film. An oxygen-deficient oxide semiconductor layer which includes crystal grains with a size of 1 nm to 10 nm and has a higher carrier concentration than the oxide semiconductor film serving as a channel formation region is provided between the oxide semiconductor film and the source and drain electrodes.Type: GrantFiled: August 20, 2009Date of Patent: July 14, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto
-
Patent number: 9083334Abstract: An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 each include a gate electrode, a gate insulating layer, a first oxide semiconductor layer, a second oxide semiconductor layer, a source electrode, and a drain electrode. The transistor 102 includes a reduction prevention layer provided over a region in the first oxide semiconductor layer between the source electrode and the drain electrode.Type: GrantFiled: February 7, 2013Date of Patent: July 14, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Jun Koyama, Kengo Akimoto, Masashi Tsubuku
-
Patent number: 9082688Abstract: A display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area is necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first oxide semiconductor layer which is over the gate insulating layer and overlaps with the gate electrode; and a first wiring layer and a second wiring layer each of which is formed by stacking a conductive layer and a second oxide semiconductor layer and whose end portions are over the first oxide semiconductor layer and overlap with the gate electrode. The gate electrode of the non-linear element is connected to a scan line or a signal line, the first wiring layer or the second wiring layer of the non-linear element is directly connected to the gate electrode layer so as to apply potential of the gate electrode.Type: GrantFiled: December 31, 2012Date of Patent: July 14, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
-
Publication number: 20150194476Abstract: It is an object of the present invention to provide a technique for manufacturing a highly reliable display device at low cost with high yield. A first electrode layer is formed by a sputtering method using a gas containing hydrogen or H2O, an electroluminescent layer is formed over the first electrode layer, and a second electrode layer is formed over the electroluminescent layer. According to one aspect of the present invention, a display device is manufactured to include a first electrode layer including indium zinc oxide containing silicon oxide and tungsten oxide, an electroluminescent layer over the first electrode layer, and a second electrode layer over the electroluminescent layer, where the electroluminescent layer includes a layer containing an organic compound and an inorganic compound to be in contact with the first electrode layer.Type: ApplicationFiled: March 18, 2015Publication date: July 9, 2015Inventors: Yoshiaki OIKAWA, Kengo AKIMOTO
-
Publication number: 20150179805Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.Type: ApplicationFiled: March 2, 2015Publication date: June 25, 2015Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kengo AKIMOTO, Hiroki OHARA, Tatsuya HONDA, Takatsugu OMATA, Yusuke NONAKA, Masahiro TAKAHASHI, Akiharu MIYANAGA
-
Publication number: 20150179675Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.Type: ApplicationFiled: March 5, 2015Publication date: June 25, 2015Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Masashi TSUBUKU, Kengo AKIMOTO, Miyuki HOSOBA, Masayuki SAKAKURA, Yoshiaki OIKAWA
-
Publication number: 20150179676Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.Type: ApplicationFiled: March 6, 2015Publication date: June 25, 2015Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Atsushi UMEZAKI
-
Patent number: 9064899Abstract: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.Type: GrantFiled: March 11, 2014Date of Patent: June 23, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiromichi Godo, Kengo Akimoto, Shunpei Yamazaki
