Patents by Inventor Kengo Akimoto
Kengo Akimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190088793Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.Type: ApplicationFiled: November 15, 2018Publication date: March 21, 2019Inventors: Hajime KIMURA, Kengo AKIMOTO, Masashi TSUBUKU, Toshinari SASAKI
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Patent number: 10236303Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.Type: GrantFiled: May 29, 2014Date of Patent: March 19, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
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Publication number: 20190081031Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.Type: ApplicationFiled: November 13, 2018Publication date: March 14, 2019Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Tomoya FUTAMURA, Takahiro KASAHARA
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Patent number: 10229904Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.Type: GrantFiled: April 30, 2015Date of Patent: March 12, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
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Publication number: 20190074361Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.Type: ApplicationFiled: November 5, 2018Publication date: March 7, 2019Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Daisuke KAWAE
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Publication number: 20190051759Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.Type: ApplicationFiled: October 17, 2018Publication date: February 14, 2019Inventors: Kengo AKIMOTO, Tatsuya HONDA, Norihito SONE
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Patent number: 10205030Abstract: To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.Type: GrantFiled: October 3, 2017Date of Patent: February 12, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Kengo Akimoto, Yasuo Nakamura
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Patent number: 10201514Abstract: There are provided microorganisms having a property of producing a lipid containing unsaturated fatty acids as constituent fatty acids and extracellularly secreting the produced lipid encapsulated in lipid particles, methods of screening said microorganisms, as well as methods of efficiently producing a fatty acid-containing lipid using said microorganisms. Furthermore, there are provided lipid particles encapsulating a lipid containing unsaturated fatty acids, and foods, cosmetics, and animal feeds comprising said lipid particles added thereto. Artificially treated microorganisms or microorganisms collected from nature are grown on a solid medium, and microbial strains that form lipid particles at the periphery of the colonies and/or microbial strains that, when cultured in a transparent liquid medium, make the culture liquid cloudy are selected.Type: GrantFiled: March 2, 2016Date of Patent: February 12, 2019Assignee: SUNTORY HOLDINGS LIMITEDInventors: Kengo Akimoto, Hiroshi Kawashima, Sakayu Shimizu
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Publication number: 20190027640Abstract: An object is to provide a semiconductor device including a thin film transistor with excellent electrical characteristics and high reliability and a method for manufacturing the semiconductor device with high mass productivity. A main point is to form a low-resistance oxide semiconductor layer as a source or drain region after forming a drain or source electrode layer over a gate insulating layer and to form an oxide semiconductor film thereover as a semiconductor layer. It is preferable that an oxygen-excess oxide semiconductor layer be used as a semiconductor layer and an oxygen-deficient oxide semiconductor layer be used as a source region and a drain region.Type: ApplicationFiled: September 25, 2018Publication date: January 24, 2019Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI
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Patent number: 10181545Abstract: An object is to provide a semiconductor device including a thin film transistor with excellent electrical characteristics and high reliability and a method for manufacturing the semiconductor device with high mass productivity. A main point is to form a low-resistance oxide semiconductor layer as a source or drain region after forming a drain or source electrode layer over a gate insulating layer and to form an oxide semiconductor film thereover as a semiconductor layer. It is preferable that an oxygen-excess oxide semiconductor layer be used as a semiconductor layer and an oxygen-deficient oxide semiconductor layer be used as a source region and a drain region.Type: GrantFiled: December 5, 2012Date of Patent: January 15, 2019Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi
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Patent number: 10176748Abstract: A novel information processing device that is highly convenient is provided. The information processing device includes a selection circuit having a function of supplying image data to a reflective display element, a light-emitting element, or both of them on the basis of input position coordinate data, sensing data about the illuminance of the usage environment, and the image data. An icon with high selection frequency is displayed by both the reflective display element and the light-emitting element on the basis of icon coordinate data and the input position coordinate data, so that the icon can be displayed brightly with improved visibility.Type: GrantFiled: January 26, 2017Date of Patent: January 8, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kengo Akimoto, Isamu Shigemori
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Patent number: 10158005Abstract: An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.Type: GrantFiled: December 3, 2013Date of Patent: December 18, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kengo Akimoto, Shunpei Yamazaki
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Patent number: 10153346Abstract: To manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor. An oxide semiconductor film is deposited by a sputtering method with the use of a polycrystalline sputtering target. In that case, partial pressure of water in a deposition chamber before or in the deposition is set to be lower than or equal to 10?3 Pa, preferably lower than or equal to 10?4 Pa, more preferably lower than or equal to 10?5 Pa. Thus, a dense oxide semiconductor film is obtained. The density of the oxide semiconductor film is higher than 6.0 g/cm3 and lower than 6.375 g/cm3.Type: GrantFiled: March 24, 2016Date of Patent: December 11, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Yusuke Nonaka, Hiroshi Kanemura
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Patent number: 10134912Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.Type: GrantFiled: February 8, 2016Date of Patent: November 20, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime Kimura, Kengo Akimoto, Masashi Tsubuku, Toshinari Sasaki
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Patent number: 10128381Abstract: A thin film transistor structure in which a source electrode and a drain electrode formed from a metal material are in direct contact with an oxide semiconductor film may lead to high contact resistance. One cause of high contact resistance is that a Schottky junction is formed at a contact plane between the source and drain electrodes and the oxide semiconductor film. An oxygen-deficient oxide semiconductor layer which includes crystal grains with a size of 1 nm to 10 nm and has a higher carrier concentration than the oxide semiconductor film serving as a channel formation region is provided between the oxide semiconductor film and the source and drain electrodes.Type: GrantFiled: May 19, 2016Date of Patent: November 13, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto
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Publication number: 20180315779Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.Type: ApplicationFiled: June 21, 2018Publication date: November 1, 2018Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
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Patent number: 10115831Abstract: In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.Type: GrantFiled: July 27, 2016Date of Patent: October 30, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masayuki Sakakura, Ryosuke Watanabe, Junichiro Sakata, Kengo Akimoto, Akiharu Miyanaga, Takuya Hirohashi, Hideyuki Kishida
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Publication number: 20180308989Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.Type: ApplicationFiled: June 28, 2018Publication date: October 25, 2018Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kengo AKIMOTO, Hiroki OHARA, Tatsuya HONDA, Takatsugu OMATA, Yusuke NONAKA, Masahiro TAKAHASHI, Akiharu MIYANAGA
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Patent number: 10103277Abstract: A method comprising a step of forming an oxide semiconductor film over a substrate by a sputtering method while heating the substrate at a temperature of higher than 200° C. and lower than or equal to 400° C. is provided. The oxide semiconductor film comprises a crystalline region and is in a non-single-crystal state. The step of forming the oxide semiconductor film is performed by using a sputtering target comprising indium, gallium, zinc and oxygen and a sputtering gas comprising at least one of a rare gas and oxygen.Type: GrantFiled: July 13, 2017Date of Patent: October 16, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kengo Akimoto, Hiroki Ohara, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka, Masahiro Takahashi, Akiharu Miyanaga
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Patent number: 10101867Abstract: A flexible display device with high viewability is provided. The display device includes a first substrate, a second substrate, a first element layer, and a second element layer. The first element layer is positioned between the first substrate and the second substrate. The second element layer is positioned between the first substrate and the second substrate. The first element layer and the second element layer overlap with each other in a region. The first substrate and the second substrate have flexibility. The first element layer includes a display element and a first circuit. The display element is electrically connected to the first circuit. The second element layer includes a sensor element. The sensor element has a function of sensing distortion.Type: GrantFiled: March 15, 2018Date of Patent: October 16, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kengo Akimoto, Hironobu Takahashi, Yuki Okamoto, Isamu Shigemori