Patents by Inventor Kengo Imagawa

Kengo Imagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8035071
    Abstract: The detection part has: a subtraction module for calculating correction data from data of detection systems when a reference-voltage generation module applies a reference voltage to the detection systems; a data-holding module for holding the correction data; an addition module for making a correction of detection data; a comparison module for comparing the detection data with switching data; and a selector for switching data of the detection systems including data subjected to the correction according to the output of the comparison module.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: October 11, 2011
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masami Makuuchi, Ritsurou Orihashi, Masayoshi Takahashi, Wen Li, Kengo Imagawa, Takahiro Jingu
  • Patent number: 7816955
    Abstract: The present invention provides a ramp generator capable of appropriately setting a rise starting point of an output voltage of a ramp waveform and an output voltage at the time of stable output. A current adjustment unit including a differential pair of transistors and an amplifier constitute a feedback circuit. By controlling the charging/discharging of an integration capacitor by ON/OFF of a discharge current source connected to a common emitter terminal of the current adjustment unit, an output of the ramp waveform outputted from an output terminal disposed at the connection end of the integration capacitor is controlled.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: October 19, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Takahashi, Kengo Imagawa, Norio Chujo
  • Patent number: 7668027
    Abstract: In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: February 23, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Kengo Imagawa, Masami Makuuchi, Ritsuro Orihashi, Yoshiharu Ikeda, Koichiro Eguchi
  • Patent number: 7474290
    Abstract: A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+?V) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: January 6, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Masami Makuuchi, Norio Chujo, Kengo Imagawa, Ritsuro Orihashi, Yoshitomo Arai
  • Publication number: 20080278717
    Abstract: The detection part has: a subtraction module for calculating correction data from data of detection systems when a reference-voltage generation module applies a reference voltage to the detection systems; a data-holding module for holding the correction data; an addition module for making a correction of detection data; a comparison module for comparing the detection data with switching data; and a selector for switching data of the detection systems including data subjected to the correction according to the output of the comparison module.
    Type: Application
    Filed: May 7, 2008
    Publication date: November 13, 2008
    Inventors: Masami Makuuchi, Ritsurou Orihashi, Masayoshi Takahashi, Wen Li, Kengo Imagawa, Takahiro Jingu
  • Patent number: 7443373
    Abstract: A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: October 28, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kengo Imagawa, Masami Makuuchi, Norio Chujo, Ritsuro Orihashi, Yoshitomo Arai
  • Publication number: 20080231330
    Abstract: The present invention provides a ramp generator capable of appropriately setting a rise starting point of an output voltage of a ramp waveform and an output voltage at the time of stable output. A current adjustment unit including a differential pair of transistors and an amplifier constitute a feedback circuit. By controlling the charging/discharging of an integration capacitor by ON/OFF of a discharge current source connected to a common emitter terminal of the current adjustment unit, an output of the ramp waveform outputted from an output terminal disposed at the connection end of the integration capacitor is controlled.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 25, 2008
    Inventors: Masayoshi Takahashi, Kengo Imagawa, Norio Chujo
  • Patent number: 7358953
    Abstract: A semiconductor device having a liquid crystal driving circuit is disclosed. The driving circuit includes a digital functional unit and an analog functional unit. The digital functional unit is comprised of a display controller and a display data storage RAM, while the analog functional unit is made up of a gradation voltage generating circuit and a gradation voltage selecting circuit. The digital and analog function units are functionally divided from each other and testing of the digital function and testing of the analog function unit are performed in an overlapping manner independently from each other.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: April 15, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Masami Makuuchi, Kengo Imagawa, Norio Chujo, Ritsuro Orihashi, Yoshitomo Arai, Atsushi Obuchi
  • Publication number: 20070047345
    Abstract: In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.
    Type: Application
    Filed: March 2, 2006
    Publication date: March 1, 2007
    Inventors: Kengo Imagawa, Masami Makuuchi, Ritsuro Orihashi, Yoshiharu Ikeda, Koichiro Eguchi
  • Publication number: 20050122297
    Abstract: A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 9, 2005
    Inventors: Kengo Imagawa, Masami Makuuchi, Norio Chujo, Ritsuro Orihashi, Yoshitomo Arai
  • Publication number: 20050122300
    Abstract: A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+?V) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.
    Type: Application
    Filed: November 5, 2004
    Publication date: June 9, 2005
    Inventors: Masami Makuuchi, Norio Chujo, Kengo Imagawa, Ritsuro Orihashi, Yoshitomo Arai
  • Publication number: 20040189564
    Abstract: A semiconductor device having a liquid crystal driving circuit is disclosed. The driving circuit includes a digital functional unit and an analog functional unit. The digital functional unit is comprised of a display controller and a display data storage RAM, while the analog functional unit is made up of a gradation voltage generating circuit and a gradation voltage selecting circuit. The digital and analog function units are functionally divided from each other and testing of the digital function and testing of the analog function unit are performed in an overlapping manner independently from each other.
    Type: Application
    Filed: November 18, 2003
    Publication date: September 30, 2004
    Inventors: Masami Makuuchi, Kengo Imagawa, Norio Chujo, Ritsuro Orihashi, Yoshitomo Arai, Atsushi Obuchi
  • Patent number: 6774680
    Abstract: A comparator is provided with a pair of transistors which are continuously in ON state, in which a switch unit constructed of a diode pair, for switching a current path in response to a high/low relationship between a voltage level of an input signal and a voltage level of a reference voltage, and a unit for converting a current into a voltage level are provided between emitter terminals of the transistor pair.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: August 10, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kengo Imagawa, Norio Chujo, Kaoru Arita, Yoshiharu Umemura, Masahiro Imanari
  • Publication number: 20030222681
    Abstract: A comparator is provided with a pair of transistors which are continuously in ON state, in which a switch unit constructed of a diode pair, for switching a current path in response to a high/low relationship between a voltage level of an input signal and a voltage level of a reference voltage, and a unit for converting a current into a voltage level are provided between emitter terminals of the transistor pair.
    Type: Application
    Filed: March 6, 2003
    Publication date: December 4, 2003
    Inventors: Kengo Imagawa, Norio Chujo, Kaoru Arita, Yoshiharu Umemura, Masahiro Imanari