Patents by Inventor Kenichi Agawa

Kenichi Agawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230089615
    Abstract: According to one embodiment, a semiconductor device c includes: a package substrate including a base including a mount portion, and terminals; a semiconductor chip including a first pad to which a ground voltage is supplied, a second pad electrically connected to a first terminal among the terminals, and a semiconductor circuit connected to the first and second pads, the semiconductor chip being provided above the mount portion; and a first capacitor chip including a first capacitor unit provided in a silicon substrate, a first node supplied with the ground voltage, and a second node electrically connected to the second pad, the first capacitor chip being provided above the mount portion.
    Type: Application
    Filed: March 10, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kenichi AGAWA, Hidetoshi MIYAHARA, Yusuke IMAIZUMI, Atsushi KUROSU, Atsushi TOMISHIMA, Jia LIU
  • Publication number: 20220302615
    Abstract: A wiring device includes: a plate having a first surface and a second surface provided above the first surface; a first protrusion provided on the second surface, the first protrusion having a side surface capable of locking a first substrate and a first upper surface including a plurality of first grooves provided parallel to a first direction, the first substrate being insertable in the first direction parallel to the second surface and being removable in a second direction opposite the first direction on the second surface and the first substrate including a terminal on a surface of the first substrate, each of the first grooves capable of accommodating a coating of a wiring including a conductor and the coating provided around the conductor, the first protrusion extending in a third direction intersecting the first direction and the second direction and the third direction being parallel to the second surface; a holder provided on the second surface, the holder including a plurality of connection portions
    Type: Application
    Filed: March 8, 2022
    Publication date: September 22, 2022
    Inventor: Kenichi AGAWA
  • Patent number: 10777925
    Abstract: According to one embodiment, a connector includes an insulating material part, and a plurality of first through conductive parts surrounded with the insulating material part, penetrating the insulating material part in a first direction, and arranged in a second direction perpendicular to the first direction, wherein each of the first through conductive parts includes a single bent portion, and the first through conductive parts are bent in the same direction.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: September 15, 2020
    Assignee: Toshiba Electronic Devices & Storage Corporation
    Inventors: Minoru Takizawa, Kenichi Agawa
  • Patent number: 10667395
    Abstract: According to one embodiment, an interposer substrate for switching wiring lines, includes a substrate body having through holes penetrating from a first main surface thereof to a second main surface, through-conductive portions provided respectively in the through holes, grouped into first groups and second groups different from the first groups, first wiring lines each provided on the first main surface and for a respective one of the first groups, second wiring lines each provided on the second main surface and for a respective one of the second groups, first terminals provided on the first main surface and connected respectively to the first wiring lines, and second terminals provided on the second main surface and connected respectively to the second wiring lines.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: May 26, 2020
    Assignee: Toshiba Electronic Devices & Storage Corporation
    Inventors: Ryoji Ninomiya, Kenichi Agawa
  • Publication number: 20200092931
    Abstract: According to an embodiment, a radio communication apparatus includes a microwave radio unit, a millimeter wave radio unit, and a control unit. The microwave radio unit transmits data using microwaves. The millimeter wave radio unit transmits the data using millimeter waves. The control unit performs control of switching as to whether to transmit the data using the microwaves or the millimeter waves depending on a transmission time period calculated from a mode selected in transmitting the data using the microwaves and a size of the data.
    Type: Application
    Filed: February 4, 2019
    Publication date: March 19, 2020
    Inventor: Kenichi Agawa
  • Publication number: 20200067220
    Abstract: According to one embodiment, a connector includes an insulating material part, and a plurality of first through conductive parts surrounded with the insulating material part, penetrating the insulating material part in a first direction, and arranged in a second direction perpendicular to the first direction, wherein each of the first through conductive parts includes a single bent portion, and the first through conductive parts are bent in the same direction.
    Type: Application
    Filed: March 5, 2019
    Publication date: February 27, 2020
    Inventors: Minoru Takizawa, Kenichi Agawa
  • Publication number: 20190223290
    Abstract: According to one embodiment, an interposer substrate for switching wiring lines, includes a substrate body having through holes penetrating from a first main surface thereof to a second main surface, through-conductive portions provided respectively in the through holes, grouped into first groups and second groups different from the first groups, first wiring lines each provided on the first main surface and for a respective one of the first groups, second wiring lines each provided on the second main surface and for a respective one of the second groups, first terminals provided on the first main surface and connected respectively to the first wiring lines, and second terminals provided on the second main surface and connected respectively to the second wiring lines.
    Type: Application
    Filed: September 10, 2018
    Publication date: July 18, 2019
    Inventors: Ryoji Ninomiya, Kenichi Agawa
  • Patent number: 8311501
    Abstract: A DC offset of a VGA is measured by selecting a ground contact of a switch. Then, the gain of the VGA is set at an appropriate value, monitoring contacts of the switch are successively selected, and the output values of an ADC for the respective cases are measured with the input to a DAC set at zero. Then, the DC offset of the VGA is removed, the DC offset value of each circuit block, such as DAC, in a transmitting part is calculated, and parameters are set so that the DC offset value of each circuit block is minimized.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: November 13, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Agawa
  • Publication number: 20120163430
    Abstract: A DC offset of a VGA is measured by selecting a ground contact of a switch. Then, the gain of the VGA is set at an appropriate value, monitoring contacts of the switch are successively selected, and the output values of an ADC for the respective cases are measured with the input to a DAC set at zero. Then, the DC offset of the VGA is removed, the DC offset value of each circuit block, such as DAC, in a transmitting part is calculated, and parameters are set so that the DC offset value of each circuit block is minimized.
    Type: Application
    Filed: March 1, 2012
    Publication date: June 28, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenichi AGAWA
  • Patent number: 8145168
    Abstract: A DC offset of a VGA is measured by selecting a ground contact of a switch. Then, the gain of the VGA is set at an appropriate value, monitoring contacts of the switch are successively selected, and the output values of an ADC for the respective cases are measured with the input to a DAC set at zero. Then, the DC offset of the VGA is removed, the DC offset value of each circuit block, such as DAC, in a transmitting part is calculated, and parameters are set so that the DC offset value of each circuit block is minimized.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: March 27, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Agawa
  • Publication number: 20100201447
    Abstract: A radio-frequency circuit comprises a low-noise amplifier, an NMOS mixer for converting a radio-frequency signal output from the low-noise amplifier into an intermediate-frequency signal, a polyphase filter for removing image noises, and a PMOS mixer for converting the intermediate-frequency signal passed through the polyphase filter into a baseband signal.
    Type: Application
    Filed: April 21, 2010
    Publication date: August 12, 2010
    Applicant: SEMICONDUCTOR TECHNOLOGY ACADAMIC RESEARCH CENTER
    Inventors: Akira Hyogo, Satoshi Tanaka, Tetsuro Sawai, Kenichi Agawa, Hirotada Honma, Ryutaro Saito, Tomoki Hikichi, Keitaro Sekine
  • Patent number: 7671683
    Abstract: A semiconductor integrated circuit has an amplifier circuit which includes a phase compensating capacitor and has a feedback loop, and a stability determining and adjusting circuit which measures an amplitude of a voltage outputted from the amplifier circuit at a predetermined plurality of frequencies and adjusts a capacitance value of the phase compensating capacitor on the basis of a ratio between measured values of the amplitude.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: March 2, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Agawa
  • Publication number: 20090088101
    Abstract: A DC offset of a VGA is measured by selecting a ground contact of a switch. Then, the gain of the VGA is set at an appropriate value, monitoring contacts of the switch are successively selected, and the output values of an ADC for the respective cases are measured with the input to a DAC set at zero. Then, the DC offset of the VGA is removed, the DC offset value of each circuit block, such as DAC, in a transmitting part is calculated, and parameters are set so that the DC offset value of each circuit block is minimized.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 2, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenichi Agawa
  • Publication number: 20080224767
    Abstract: A semiconductor integrated circuit has an amplifier circuit which includes a phase compensating capacitor and has a feedback loop, and a stability determining and adjusting circuit which measures an amplitude of a voltage outputted from the amplifier circuit at a predetermined plurality of frequencies and adjusts a capacitance value of the phase compensating capacitor on the basis of a ratio between measured values of the amplitude.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 18, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenichi Agawa
  • Publication number: 20060194559
    Abstract: A radio-frequency circuit comprises a low-noise amplifier, an NMOS mixer for converting a radio-frequency signal output from the low-noise amplifier into an intermediate-frequency signal, a polyphase filter for removing image noises, and a PMOS mixer for converting the intermediate-frequency signal passed through the polyphase filter into a baseband signal.
    Type: Application
    Filed: February 15, 2006
    Publication date: August 31, 2006
    Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER
    Inventors: Akira Hyogo, Satoshi Tanaka, Tetsuro Sawai, Kenichi Agawa, Hirotada Honma, Ryutaro Saito, Tomoki Hikichi, Keitaro Sekine
  • Patent number: 6343039
    Abstract: A data transfer circuit includes data lines for transferring data, interface input/output blocks connected to the data lines for input or output of data through the data lines, and a leakage current monitor and compensate circuit connected to the data lines to detect and store magnitudes of leakage currents in the data lines before input or output of data, and generate and supply to the data lines compensation currents that compensate the leakage currents upon input or output of data. An example of the data line is a bit line of a memory, and an example of the interface input/output block is a memory cell.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: January 29, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Agawa, Toshinari Takayanagi
  • Publication number: 20010007537
    Abstract: A data transfer circuit includes data lines for transferring data, interface input/output blocks connected to the data lines for input or output of data through the data lines, and a leakage current monitor and compensate circuit connected to the data lines to detect and store magnitudes of leakage currents in the data lines before input or output of data, and generate and supply to the data lines compensation currents that compensate the leakage currents upon input or output of data. An example of the data line is a bit line of a memory, and an example of the interface input/output block is a memory cell.
    Type: Application
    Filed: January 5, 2001
    Publication date: July 12, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenichi Agawa, Toshinari Takayanagi