Patents by Inventor Kenichi Douniwa

Kenichi Douniwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8184703
    Abstract: According to one embodiment, an interpolated frame generator comprises first detector detects potential motion vector by block matching between input frame images, using first block of fixed size, second detector detects motion vector by block matching between the input frame images, using second block having fixed size larger than that of the first block, and generator generates interpolated frame by using the potential motion vector when first detector detects only one potential motion vector, and generates interpolated frame by using a potential motion vector closest to the motion vector detected by the second detector when first detector detects a plurality of motion vectors, wherein first detector includes extractor compares SAD of motion vector with SAD of motion vectors adjacent to the motion vector, and extracts potential motion vector having SAD smaller than any of the SAD of adjacent motion vectors, as a potential motion vector used in generator.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: May 22, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yohei Hamakawa, Masaya Yamasaki, Atsuo Shono, Hiroshi Yoshimura, Keiko Hirayama, Ko Sato, Kenichi Douniwa, Yoshihiko Ogawa
  • Patent number: 8155198
    Abstract: According to one embodiment, interpolated frame generating method of generating a new interpolated frame inserted between sequential frames, by using a plurality of input frame images, comprises first detecting of detecting at least one potential motion vector by block matching between the input frame images, using a first block of a fixed size, second detecting of detecting a motion vector by block matching between the input frame images, using a second block having a size variable within a range larger than that of the first block, and generating the interpolated frame by using the potential motion vector. The generating is generating the interpolated frame by using a potential motion vector closest to the motion vector detected by the second detecting among the potential motion vectors when a plurality of motion vectors are detected by the first detecting.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: April 10, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaya Yamasaki, Yohei Hamakawa, Atsuo Shono, Hiroshi Yoshimura, Keiko Hirayama, Ko Sato, Kenichi Douniwa, Yoshihiko Ogawa
  • Publication number: 20080240617
    Abstract: According to one embodiment, there is provided an interpolation frame generating apparatus including a detecting unit which obtains a first frame image and a second frame image continuously following the first frame image from an imparted image signal, compares the first frame image and the second frame image in a luminance component and a color-difference component, and detects a motion vector based on a comparison result, and a generating unit which generates an interpolating motion vector from the motion vector detected by the detecting unit, and generates an interpolation frame image based on the first frame image, the second frame image, and the interpolating motion vector.
    Type: Application
    Filed: March 5, 2008
    Publication date: October 2, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: KENICHI DOUNIWA
  • Publication number: 20080137747
    Abstract: According to one embodiment, interpolated frame generating method of generating a new interpolated frame inserted between sequential frames, by using a plurality of input frame images, comprises first detecting of detecting at least one potential motion vector by block matching between the input frame images, using a first block of a fixed size, second detecting of detecting a motion vector by block matching between the input frame images, using a second block having a size variable within a range larger than that of the first block, and generating the interpolated frame by using the potential motion vector. The generating is generating the interpolated frame by using a potential motion vector closest to the motion vector detected by the second detecting among the potential motion vectors when a plurality of motion vectors are detected by the first detecting.
    Type: Application
    Filed: December 5, 2007
    Publication date: June 12, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: MASAYA YAMASAKI, Yohei Hamakawa, Atsuo Shono, Hiroshi Yoshimura, Keiko Hirayama, Ko Sato, Kenichi Douniwa, Yoshihiko Ogawa
  • Publication number: 20080130752
    Abstract: According to one embodiment, an interpolated frame generator comprises first detector detects potential motion vector by block matching between input frame images, using first block of fixed size, second detector detects motion vector by block matching between the input frame images, using second block having fixed size larger than that of the first block, and generator generates interpolated frame by using the potential motion vector when first detector detects only one potential motion vector, and generates interpolated frame by using a potential motion vector closest to the motion vector detected by the second detector when first detector detects a plurality of motion vectors, wherein first detector includes extractor compares SAD of motion vector with SAD of motion vectors adjacent to the motion vector, and extracts potential motion vector having SAD smaller than any of the SAD of adjacent motion vectors, as a potential motion vector used in generator.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 5, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yohei Hamakawa, Masaya Yamasaki, Atsuo Shono, Hiroshi Yoshimura, Keiko Hirayama, Ko Sato, Kenichi Douniwa, Yoshihiko Ogawa
  • Publication number: 20080123743
    Abstract: According to one embodiment, an interpolated frame generating method of generating a new interpolated frame to be inserted between sequential frames by using a plurality of input frame images, comprises detecting a motion vector of an object in frame images by block matching processing between the input frame images, determining certainty of the motion vector detected in the detecting, and determining a certain motion vector and an uncertain motion vector based on a result of the determining, and generating the interpolated frame by using the motion vector detected in the detecting. The generating is generating the interpolated frame by setting a value of a motion vector determined as an uncertain motion vector in the determining to zero.
    Type: Application
    Filed: November 27, 2007
    Publication date: May 29, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenichi Douniwa, Masaya Yamasaki, Yohei Hamakawa, Atsuo Shono, Hiroshi Yoshimura, Keiko Hirayama, Ko Sato, Yoshihiko Ogawa
  • Publication number: 20080063289
    Abstract: According to one embodiment, a frame interpolating circuit including detecting unit which detects first frame image and second frame image from an input image signal and compares both the images with each other to detect a plurality of motion vectors in a plurality of blocks obtained by dividing the frame into blocks, filter unit which selects, of motion vectors in an upper block of one block and motion vectors in a right block of the one block, motion vector having vector value which is close to the values of the motion vectors and changes the values of the motion vectors in the one block into value different from the value of the motion vector by predetermined value (step), and interpolated frame generating unit which generates interpolated image on the basis of the motion vectors the values of which are changed and the first and second frame image.
    Type: Application
    Filed: September 6, 2007
    Publication date: March 13, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi Yoshimura, Ko Sato, Keiko Hirayama, Yoshihiko Ogawa, Masaya Yamasaki, Yohei Hamakawa, Kenichi Douniwa
  • Publication number: 20080063308
    Abstract: According to one embodiment, there is provided a frame interpolating circuit including a detecting unit which compares a first frame image and a second frame image from an input image signal with each other and detects a plurality of motion vectors in the frames, a limiting unit which limits values of the detected motion vectors in predetermined regions in the frames to a value equal to or smaller than a predetermined value, and an interpolated frame generating unit which generates and outputs an interpolated frame on the basis of the plurality of motion vectors from the detecting unit, the motion vectors the values of which are limited and which are output from the limiting unit, and the first frame image and the second frame image.
    Type: Application
    Filed: September 6, 2007
    Publication date: March 13, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ko Sato, Masaya Yamasaki, Keiko Hirayama, Hiroshi Yoshimura, Yohei Hamakawa, Kenichi Douniwa, Yoshihiko Ogawa
  • Publication number: 20080063067
    Abstract: According to one embodiment, there is provided a frame interpolating circuit including a detecting unit which detects a first frame image and a second frame image from an input image signal and compares both the images to detect a motion vector, a comparing unit which compares a size of the motion vector with a predetermined value, and a generating unit which, when the size of the motion vector is not more than the predetermined value as a result of comparison, generates and outputs an interpolated image between the first frame image and the second frame image on the basis of the detected motion vector and which, when the size of the motion vector is not less than the predetermined value as a result of comparison, reduces the size of the detected motion vector and generates the interpolated image between the first and second frame images.
    Type: Application
    Filed: September 7, 2007
    Publication date: March 13, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiko Hirayama, Masaya Yamasaki, Ko Sato, Hiroshi Yoshimura, Yohei Hamakawa, Kenichi Douniwa, Yoshihiko Ogawa
  • Publication number: 20080031338
    Abstract: According to one embodiment, an interpolation frame generating method includes detecting a motion vector of an object in input frame images by block matching processing between the input frame images, generating an interpolation frame by using the detected motion vector, and inserting the interpolation frame between the input image frames. The detecting includes calculating an absolute difference value between values of each pair of pixels located in same position in respective image blocks which are located in positions corresponding to each other on former and latter frames of the input frame images. A vector based on positions of a pair of blocks on the former and latter frames having minimum SAD indicating a cumulative sum value of the absolute difference values is selected as the motion vector. When the absolute difference value is larger than a predetermined value, the difference value is changed, and a possibility of erroneous detection of motion vector is reduced.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 7, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ko Sato, Masaya Yamasaki, Keiko Hirayama, Hiroshi Yoshimura, Yohei Hamakawa, Kenichi Douniwa, Yoshihiko Ogawa
  • Publication number: 20080025403
    Abstract: According to one embodiment, an interpolation frame generating method performs motion detection processing using two blocks having different sizes, and adopts a motion vector detected by a smaller block under normal conditions. When a plurality of reliable motion vector candidates are detected in vector detection using the smaller block, a vector detected by a larger block is referred to, and a motion vector which is closest to the motion vector detected with the larger block among the motion vectors detected with the smaller block is adopted as a motion vector of the block to be used for generating an interpolation frame.
    Type: Application
    Filed: July 31, 2007
    Publication date: January 31, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ko Sato, Masaya Yamasaki, Keiko Hirayama, Hiroshi Yoshimura, Yohei Hamakawa, Kenichi Douniwa, Yoshihiko Ogawa
  • Publication number: 20070192050
    Abstract: According to one embodiment, an interface control apparatus controls an interface to which a calibration is required in use. The interface control apparatus includes an interface controller configured to drive the interface, a storage device that stores a predicted value of a setting value after the calibration is carried out on the interface, the setting value to be set to the interface controller, and a setting unit configured to set the setting value to the interface controller based on the predicted value stored in the storage device.
    Type: Application
    Filed: January 29, 2007
    Publication date: August 16, 2007
    Inventors: Kenichi Douniwa, Tsutomu Unesaki
  • Publication number: 20070079160
    Abstract: According to one embodiment, there is provided a controller for use in a multiprocessor incorporating a plurality of processors on one chip. The controller includes a communication section to perform communication with the plurality of processors, and a control section to perform control of switching operation states of the plurality processors one by one at every specified time via the communication section.
    Type: Application
    Filed: September 12, 2006
    Publication date: April 5, 2007
    Inventor: Kenichi Douniwa
  • Publication number: 20060280484
    Abstract: According to one embodiment, in a recording/playback method, based on a guaranteed performance for guaranteeing a real-time operation for each unit which performs various processes for a recording/playback process, and required performances for each unit in executing the various processes, a sum of the required performances for each unit in executing a plurality of designated real-time processes is calculated, and the sum of the required performances for each unit is compared with the guaranteed performance for each unit. When the sum of the required performances for the plurality of the real-time processes does not exceed the guaranteed performance, the plurality of designated real-time processes are executed. On the other hand, when the sum of the required performances for the plurality of the real-time processes exceeds the guaranteed performance, some of the plurality of designated real-time processes are changed, and the changed processes are executed.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 14, 2006
    Inventor: Kenichi Douniwa
  • Publication number: 20050105626
    Abstract: A digital broadcasting data receiving apparatus, includes a packet input section configured to input a packet having a program clock reference value related to digital broadcasting, a decode section configured to decode the packet input by the packet input section, a system time clock reproducing section configured to reproduce a system time clock used for a synchronizing process executed in the decode section, and a system time clock control section configured to control the system time clock reproducing section to correct the system time clock reproduced by the system time clock reproducing section in accordance with a difference between the value of the system time clock and the program clock reference value.
    Type: Application
    Filed: October 28, 2004
    Publication date: May 19, 2005
    Inventor: Kenichi Douniwa
  • Patent number: 6687784
    Abstract: A controller writes, after writing data into a nonvolatile memory unit, new management information that reflects the data wiring, into an area of the memory unit other than an area of the nonvolatile memory unit, which stores last management information. After that, the controller writes an old management information flag in relation to the last management information. Further, the controller searches the memory unit for updated, normal management information when initializing the memory system. If it does not find updated, normal management information, the controller restores updated management information on the basis of normal old management information related to the old management information flag.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: February 3, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Douniwa, Akihisa Fujimoto, Katsuyuki Nomura
  • Publication number: 20020069313
    Abstract: A controller writes, after writing data into a nonvolatile memory unit, new management information that reflects the data wiring, into an area of the memory unit other than an area of the nonvolatile memory unit, which stores last management information. After that, the controller writes an old management information flag in relation to the last management information. Further, the controller searches the memory unit for updated, normal management information when initializing the memory system. If it does not find updated, normal management information, the controller restores updated management information on the basis of normal old management information related to the old management information flag.
    Type: Application
    Filed: September 18, 2001
    Publication date: June 6, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenichi Douniwa, Akihisa Fujimoto, Katsuyuki Nomura
  • Patent number: 6308323
    Abstract: An apparatus and method for compiling a source program for a processor having a plurality of different instruction sets at high speed by selecting an optimum instruction set. The compiling method comprises dividing a source program into a plurality of modules according to a predetermined unit, compiling the respective modules with respective ones of the plurality of different instruction sets, providing data for evaluating an efficient compiling process based upon the module compilations with the respective instruction sets, selecting an optimum instruction set among the plurality of different instruction sets by comparing the evaluation data, and inserting an instruction set changing command at a necessary portion for changing the instruction set.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: October 23, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Douniwa