Patents by Inventor Kenichi Hamano

Kenichi Hamano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220416080
    Abstract: An object of the present disclosure is to achieve a stable current sensing operation and suppress decrease in main current at a low temperature of 0° C. or less in a silicon carbide semiconductor device. An SiC-MOSFET includes: a main cell outputting main current; and a sense cell outputting sense current proportional to the main current, wherein temperature dependent properties of the main current differ in accordance with threshold voltage of the main cell, temperature dependent properties of the sense current differ in accordance with threshold voltage of the sense cell, the threshold voltage of the main cell is smaller than the threshold voltage of the sense cell, and in a temperature of 0° C. or less, an inclination of the temperature dependent properties of the main current is smaller than an inclination of the temperature dependent properties of the sense current.
    Type: Application
    Filed: April 5, 2022
    Publication date: December 29, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kenichi HAMANO
  • Patent number: 11088073
    Abstract: In some examples, a semiconductor device includes a substrate, an interlayer insulating film, a gate pad provided on the interlayer insulating film, a source electrode that is provided on the interlayer insulating film, source wiring provided on the interlayer insulating film, and gate wiring that is provided on the interlayer insulating film and is electrically connected to the gate pad. The size of the source wiring is not increased, and a high impurity concentration region having a higher impurity concentration than a drift layer is formed on the surface of the substrate at a location directly below the gate pad.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: August 10, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Matsuno, Toshikazu Tanioka, Yasunori Oritsuki, Kenichi Hamano, Naochika Hanano
  • Patent number: 10950435
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: March 16, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Yasuhiro Kimura, Yoichiro Mitani
  • Patent number: 10910218
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: February 2, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Yasuhiro Kimura, Yoichiro Mitani
  • Publication number: 20200303296
    Abstract: In some examples, a semiconductor device includes a substrate, an interlayer insulating film, a gate pad provided on the interlayer insulating film, a source electrode that is provided on the interlayer insulating film, source wiring provided on the interlayer insulating film, and gate wiring that is provided on the interlayer insulating film and is electrically connected to the gate pad. The size of the source wiring is not increased, and a high impurity concentration region having a higher impurity concentration than a drift layer is formed on the surface of the substrate at a location directly below the gate pad.
    Type: Application
    Filed: February 5, 2020
    Publication date: September 24, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori MATSUNO, Toshikazu TANIOKA, Yasunori ORITSUKI, Kenichi HAMANO, Naochika HANANO
  • Patent number: 10711372
    Abstract: A silicon carbide epitaxial wafer manufacturing method includes: a stabilization step of nitriding, oxidizing or oxynitriding and stabilizing silicon carbide attached to an inner wall surface of a growth furnace; after the stabilization step, a bringing step of bringing a substrate in the growth furnace; and after the bringing step, a growth step of epitaxially growing a silicon carbide epitaxial layer on the substrate by supplying a process gas into the growth furnace to manufacture a silicon carbide epitaxial wafer.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: July 14, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Kenichi Hamano, Takashi Kanazawa
  • Patent number: 10707075
    Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: July 7, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Masashi Sakai, Yasuhiro Kimura, Yoichiro Mitani, Takashi Kanazawa
  • Publication number: 20200144053
    Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.
    Type: Application
    Filed: November 28, 2016
    Publication date: May 7, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Akihito OHNO, Takuma MIZOBE, Masashi SAKAI, Yasuhiro KIMURA, Yoichiro MITANI, Takashi KANAZAWA
  • Publication number: 20200020528
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Application
    Filed: April 6, 2017
    Publication date: January 16, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Akihito OHNO, Takuma MIZOBE, Yasuhiro KIMURA, Yoichiro MITANI
  • Patent number: 10508362
    Abstract: A substrate mounting member according to the present invention is a member for mounting a SiC substrate for epitaxial growth, which includes a wafer plate including a SiC polycrystal, and a supporting plate configured to be placed on the wafer plate, include no SiC polycrystal and have a surface serving as a SiC substrate placing surface, the surface being on the side opposite to a surface in contact with the wafer plate, and in which a thickness h [mm] of the supporting plate satisfies an expression h4?3 pa4(1?v2){(5+v)/(1+v)}/16E when a force applied to a unit area of the supporting plate by a self-weight of the supporting plate and by the SiC substrate is represented as p [N/mm2], a radius of the supporting plate as a [mm], a Poisson's ratio as v and a Young's modulus as E [MPa].
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: December 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Hiroaki Sumitani
  • Publication number: 20190284718
    Abstract: A silicon carbide epitaxial wafer manufacturing method includes: a stabilization step of nitriding, oxidizing or oxynitriding and stabilizing silicon carbide attached to an inner wall surface of a growth furnace; after the stabilization step, a bringing step of bringing a substrate in the growth furnace; and after the bringing step, a growth step of epitaxially growing a silicon carbide epitaxial layer on the substrate by supplying a process gas into the growth furnace to manufacture a silicon carbide epitaxial wafer.
    Type: Application
    Filed: June 3, 2019
    Publication date: September 19, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihito OHNO, Kenichi HAMANO, Takashi KANAZAWA
  • Patent number: 10370775
    Abstract: A silicon carbide epitaxial wafer manufacturing method includes: a stabilization step of nitriding, oxidizing or oxynitriding and stabilizing silicon carbide attached to an inner wall surface of a growth furnace; after the stabilization step, a bringing step of bringing a substrate in the growth furnace; and after the bringing step, a growth step of epitaxially growing a silicon carbide epitaxial layer on the substrate by supplying a process gas into the growth furnace to manufacture a silicon carbide epitaxial wafer.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 6, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Kenichi Hamano, Takashi Kanazawa
  • Patent number: 10229830
    Abstract: The present invention is aimed at providing a method of manufacturing a silicon carbide epitaxial wafer by which a plurality of silicon carbide epitaxial layers of a predetermined layer thickness can be precisely formed. In the present invention, a first n-type SiC epitaxial layer is formed on an n-type SiC substrate so that the rate of change in impurity concentration between the n-type SiC substrate and the first n-type SiC epitaxial layer will be greater than or equal to 20%. A second n-type SiC epitaxial layer is formed on the first n-type SiC epitaxial layer so that the rate of change in impurity concentration between the first n-type SiC epitaxial layer and the second n-type SiC epitaxial layer will be greater than or equal to 20%.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: March 12, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Ryo Hattori, Takuyo Nakamura
  • Publication number: 20180226246
    Abstract: The present invention is aimed at providing a method of manufacturing a silicon carbide epitaxial wafer by which a plurality of silicon carbide epitaxial layers of a predetermined layer thickness can be precisely formed. In the present invention, a first n-type SiC epitaxial layer is formed on an n-type SiC substrate so that the rate of change in impurity concentration between the n-type SiC substrate and the first n-type SiC epitaxial layer will be greater than or equal to 20%. A second n-type SiC epitaxial layer is formed on the first n-type SiC epitaxial layer so that the rate of change in impurity concentration between the first n-type SiC epitaxial layer and the second n-type SiC epitaxial layer will be greater than or equal to 20%.
    Type: Application
    Filed: October 14, 2014
    Publication date: August 9, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Ryo HATTORI, Takuyo NAKAMURA
  • Patent number: 9988738
    Abstract: A method for manufacturing a SiC epitaxial wafer includes: a first step of, by supplying a Si supply gas and a C supply gas, performing a first epitaxial growth on a SiC bulk substrate with a 4H—SiC(0001) having an off-angle of less than 5° as a main surface at a first temperature of 1480° C. or higher and 1530° C. or lower; a second step of stopping the supply of the Si supply gas and the C supply gas and increasing a temperature of the SiC bulk substrate from the first temperature to a second temperature; and a third step of, by supplying the Si supply gas and the C supply gas, performing a second epitaxial growth on the SiC bulk substrate having the temperature increased in the second step at the second temperature.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: June 5, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuyuki Tomita, Yoichiro Mitani, Takanori Tanaka, Naoyuki Kawabata, Yoshihiko Toyoda, Takeharu Kuroiwa, Kenichi Hamano, Akihito Ono, Junji Ochi, Zempei Kawazu
  • Patent number: 9957638
    Abstract: A method for manufacturing a silicon carbide semiconductor device includes: preparing a silicon carbide single crystal substrate having a flatness with an average roughness of 0.2 nm or less; gas-etching a surface of the silicon carbide single crystal substrate under an atmosphere of a reducing gas; and forming a silicon carbide layer on the gas-etched surface of the silicon carbide single crystal substrate, wherein an etching rate of the gas etching is made in a range of 0.5 ?m/hour or faster to 2.0 ?m/hour or slower.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: May 1, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Yoichiro Mitani, Takahiro Yamamoto, Nobuyuki Tomita, Kenichi Hamano
  • Patent number: 9903048
    Abstract: A single-crystal 4H-SiC substrate includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The recesses have a diameter no smaller than 2 ?m and no larger than 20 ?m. The recesses have a depth no smaller than 0.01 ?m and no larger than 0.1 ?m. A single-crystal 4H-SiC substrate also includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The density of the recesses in the epitaxial first single-crystal 4H-SiC layer is at least 10/cm2, and the epitaxial first single-crystal 4H-SiC layer has a defect density no larger than 2/cm2.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: February 27, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Zempei Kawazu, Nobuyuki Tomita, Takanori Tanaka, Yoichiro Mitani, Kenichi Hamano
  • Publication number: 20170327143
    Abstract: When relative positions of cages are changed from first positions to second positions, rollers are moved toward each other against an elastic biasing force of an elastic member such that an off state is achieved in which the rollers are disengaged from a cam surface or an inner peripheral surface portion to have a clearance therefrom. When the relative positions of the cages are changed from the second positions to the first positions, the rollers are moved away from each other by the elastic biasing force such that an on state is achieved in which one of the rollers on a downstream side engages with the cam surface or the inner peripheral surface portion without any clearance while the other of the rollers on an upstream side has a clearance from the cam surface or the inner peripheral surface portion.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 16, 2017
    Applicant: JTEKT CORPORATION
    Inventors: Gento ARAMOTO, Kenichi HAMANO
  • Publication number: 20170314160
    Abstract: A silicon carbide epitaxial wafer manufacturing method includes: a stabilization step of nitriding, oxidizing or oxynitriding and stabilizing silicon carbide attached to an inner wall surface of a growth furnace; after the stabilization step, a bringing step of bringing a substrate in the growth furnace; and after the bringing step, a growth step of epitaxially growing a silicon carbide epitaxial layer on the substrate by supplying a process gas into the growth furnace to manufacture a silicon carbide epitaxial wafer.
    Type: Application
    Filed: December 8, 2016
    Publication date: November 2, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihito OHNO, Kenichi HAMANO, Takashi KANAZAWA
  • Publication number: 20170283984
    Abstract: A substrate mounting member according to the present invention is a member for mounting a SiC substrate for epitaxial growth, which includes a wafer plate including a SiC polycrystal, and a supporting plate configured to be placed on the wafer plate, include no SiC polycrystal and have a surface serving as a SiC substrate placing surface, the surface being on the side opposite to a surface in contact with the wafer plate, and in which a thickness h [mm] of the supporting plate satisfies an expression h4?3pa4(1?v2){(5+v)/(1+v)}16E when a force applied to a unit area of the supporting plate by a self-weight of the supporting plate and by the SiC substrate is represented as p [N/mm2], a radius of the supporting plate as a [mm], a Poisson's ratio as v and a Young's modulus as E [MPa].
    Type: Application
    Filed: November 22, 2016
    Publication date: October 5, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Hiroaki SUMITANI