Abstract: The present invention provides a method for producing an aqueous carbodiimide having excellent crosslinking reactivity with a crosslinking group, such as an alcoholic hydroxy group of an aqueous resin.

Abstract: The purpose of the present invention is to provide a gas engine and a ship provided with the same, the gas engine making it is possible to ensure a distance that enables fuel and an oxidizing agent to mix, and to evenly mix the oxidizing agent and the fuel even if the flow rate of gas traveling towards intake pipes varies. A gas engine (1) comprises: an intake passage (10) through which a gas flows; a plurality of intake pipes (12A, 12B) where the intake passage (10) branches apart at a branching section (14) that is downstream in the gas flow direction, the intake pipes opening to a cylinder (16) at the downstream end; and a fuel injection means (31) that injects fuel into the intake passage (10). The fuel injection means (31) is provided upstream of the branching section (14) in the gas flow direction, and injects varying quantities of fuel into the plurality of intake pipes (12A, 12B).

Abstract: The purpose of the present invention is to provide a gas engine and a ship provided with the same, the gas engine making it is possible to ensure a distance that enables fuel and an oxidizing agent to mix, and to evenly mix the oxidizing agent and the fuel even if the flow rate of gas traveling towards intake pipes varies. A gas engine (1) comprises: an intake passage (10) through which a gas flows; a plurality of intake pipes (12A, 12B) where the intake passage (10) branches apart at a branching section (14) that is downstream in the gas flow direction, the intake pipes opening to a cylinder (16) at the downstream end; and a fuel injection means (31) that injects fuel into the intake passage (10). The fuel injection means (31) is provided upstream of the branching section (14) in the gas flow direction, and injects varying quantities of fuel into the plurality of intake pipes (12A, 12B).

Abstract: A method includes using a direct memory access controller, transferring first data from a memory to an input/output control circuit via a first bus and transferring the first data from the input/output control circuit to an authentication processing circuit via a second bus, without using the first bus. The method includes using the authentication processing circuit, generating authentication data based on the first data and transferring the first data from the input/output control circuit to a cryptography processing circuit via a third bus, without using the first bus. Responsive to authentication of the first data by a first CPU coupled to the first bus, the method includes using the cryptography processing circuit, decrypting the first data, and using the direct memory access controller, transferring the decrypted first data from the input/output control circuit to the memory via the first bus.

Abstract: A method includes using a direct memory access controller, transferring first data from a memory to an input/output control circuit via a first bus and transferring the first data from the input/output control circuit to an authentication processing circuit via a second bus, without using the first bus. The method includes using the authentication processing circuit, generating authentication data based on the first data and transferring the first data from the input/output control circuit to a cryptography processing circuit via a third bus, without using the first bus. Responsive to authentication of the first data by a first CPU coupled to the first bus, the method includes using the cryptography processing circuit, decrypting the first data, and using the direct memory access controller, transferring the decrypted first data from the input/output control circuit to the memory via the first bus.

Abstract: Described herein is a security network controller having a main bus to which is coupled a central processing unit, a cryptographic processing circuit, a security control circuit, and a memory controller. The security control circuit is configured to receive data stored in memory from the memory controller over the main bus and send the data over a first dedicated bus to the cryptographic processing circuit to obtain encrypted data. The security control circuit is further configured to receive the encrypted data over the first dedicated bus from the cryptographic processing circuit and send the encrypted data to the memory controller over the main bus. The memory controller stores the encrypted data in memory of the security network controller.

Abstract: Described herein is a security network controller having a main bus to which is coupled a central processing unit, a cryptographic processing circuit, a security control circuit, and a memory controller. The security control circuit is configured to receive data stored in memory from the memory controller over the main bus and send the data over a first dedicated bus to the cryptographic processing circuit to obtain encrypted data. The security control circuit is further configured to receive the encrypted data over the first dedicated bus from the cryptographic processing circuit and send the encrypted data to the memory controller over the main bus. The memory controller stores the encrypted data in memory of the security network controller.

Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.

Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.

Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.

Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.

Abstract: There is provided an inter-bus communication interface device capable of efficiently performing transfer of data between a plurality of devices connected to different buses, respectively. When communication data is transmitted, a first device writes the communication data into a buffer, whereas when communication control information is transmitted, the first device writes the communication control information into a register. A control circuit passes the communication data stored in the buffer to a second device, and passes the communication control information stored in the register to a second device.

Abstract: A torque control unit rotates a motor machine having a motor element and a load element. The load element is coupled to the motor element via a rotational main shaft and driven to rotate by the motor element. Rotational acceleration at each rotation angle during one revolution of the rotational main shaft is detected and fed back. An electromagnetic torque of the motor element is controlled so that a difference between the electromagnetic torque of the motor element and a load torque of the load element may become zero at each rotation angle of the rotational main shaft.

Abstract: In speed control apparatus and method for a motor operable to drive a load whose magnitude varies over a predetermined period which use a unit for controlling voltage or current supplied to the motor such that the speed of the motor can coincide with a command speed, n pieces of data indicative of voltages or currents supplied to the motor and corresponding to n divisions of the predetermined period are independently stored in a read/write storage, at least one of the n pieces of data is corrected at the rate of each of the n divisions in accordance with a difference between the command speed and the speed of the motor, and the voltage or current supplied to the motor is controlled in accordance with at least the one of the n pieces of data, so that pulsation and noise occurring especially under low revolutions can be minimized.

Abstract: AC power supply is converted to DC by a rectifier circuit. The DC is stepped up by a step-up chopper circuit. The output of the step-up chopper circuit is smoothed by a smoothing circuit. The output of the smoothing circuit is input to an inverter via a current detecting circuit and a voltage detecting circuit. A synchronous motor is connected to the inverter. When the speed of the synchronous motor is judged to be in a high speed region based on the output signal of the voltage detecting circuit, the first speed control apparatus operates the interrupting control of the switching element of the step-up chopper circuit in such a manner that a deviation speed between an instruction speed signal to the motor and the detected speed of the motor reaches to zero.

Abstract: A method of magnetizing a rotor of a motor including the rotor made of an integrated magnet member and a stator is provided. Predetermined magnetic fields are preliminarily applied to the rotor to form magnetic paths and thereafter, the rotor is demagnetized. Then, the rotor is assembled into the stator. The rotor and stator are positioned such that the directions of the magnetic fields which are generated from the stator winding of the stator coincide with the directions of the magnetic paths of the rotor. Subsequently, in the state in which both of the rotor and stator are positioned, a current is supplied to the stator winding and the magnetic fields are generated, thereby magnetizing the rotor by the magnetic fields.

Abstract: A refrigerator temperature control system is disclosed in which the compressor for compressing a refrigerant is driven selectively at either a normal lower rotation speed or a higher rotational speed and the higher rotational speed is applied only when any of the freezer compartment temperature and the fresh food compartment temperature is not reduced below a predetermined temperature level for at least a predetermined time interval.

Abstract: An inverting apparatus comprises: a capacitor input type rectifying circuit consisting of a full-wave rectifier and a smoothing capacitor; a single-phase bridge inverter having four semiconductor switches; and a driving control unit for opening and closing the semiconductor switches, wherein the smoothing capacitor is provided with a switch to open and close the smoothing capacitor.

Abstract: The present invention continuously speed-controls an electric motor for driving a compressor for refrigerant compression such that the compressor is driven in its maximum rpm if the difference (temperature deviation) between a target cooling temperature and an actual temperature is greater than a first predetermined value, the compressor is stopped if the temperature deviation is less than a second predetermined value, and the compressor is speed-controlled by a digital control signal if the temperature deviation is between said first and second predetermined values.

Abstract: A novel refrigerator control system is disclosed which comprises an inverter for driving a motor for a compressor, and a change-over device for driving the compressor directly with a commercial power supply when the compressor motor is not driven by the inverter.