Abstract: A movable-blade operation system for a hydraulic machine according to an embodiment includes an oil hydraulic cylinder installed within a rotational shaft, a bidirectional pump, a pump drive motor, a control unit, and an oil head installed in the hydraulic machine. The bidirectional pump selectively feeds pressurized hydraulic oil to one of a first cylinder chamber and a second cylinder chamber. The oil head couples the rotational shaft rotatably, and the hydraulic oil fed from the bidirectional pump to the first cylinder chamber and the second cylinder chamber flows through the oil head. The bidirectional pump, the pump drive motor, and the control unit are installed outside the hydraulic machine.

Abstract: A movable-blade operation system for a hydraulic machine according to an embodiment includes an oil hydraulic cylinder installed within a rotational shaft, a bidirectional pump, a pump drive motor, a control unit, and an oil head installed in the hydraulic machine. The bidirectional pump selectively feeds pressurized hydraulic oil to one of a first cylinder chamber and a second cylinder chamber. The oil head couples the rotational shaft rotatably, and the hydraulic oil fed from the bidirectional pump to the first cylinder chamber and the second cylinder chamber flows through the oil head. The bidirectional pump, the pump drive motor, and the control unit are installed outside the hydraulic machine.

Abstract: Disclosed is an IC card having a connector wherein a socket or a jack can be inserted in a direction that is parallel to the face of the IC card. The connector includes a connector body having a rotatable housing attached thereto. The housing has an opening by which a socket or a jack can be fitted and secured to the connector body. When a socket or a jack is not connected to the IC card, the housing member can lie level along the face of the IC card but when a socket is to be connected, the housing can be raised such that it is almost perpendicular to the face of the IC card. The socket or the jack can therefore be inserted parallel to the face of the IC card.

Abstract: A wavelength-domain-multiplication memory comprises a first semiconductor layer including a first conductivity type impurity, a carrier barrier semiconductor layer formed on the first semiconductor layer, and quantum dots formed in the carrier barrier semiconductor layer.

Abstract: A photodetection device includes a collector layer, a collector electrode connected electrically to the collector layer, a base layer free from a junction region for contacting with an electrode, an emitter layer including at least two, mutually separated emitter regions; and at least two emitter electrodes provided respectively on the emitter regions, wherein the base layer is exposed optically to an external optical radiation.

Abstract: A photodetection device includes a collector layer, a collector electrode connected electrically to the collector layer, a base layer free from a junction region for contacting with an electrode, an emitter layer including at least two, mutually separated emitter regions; and at least two emitter electrodes provided respectively on the emitter regions, wherein the base layer is exposed optically to an external optical radiation.

Abstract: A hetero-bipolar transistor includes a collector layer of a first conductivity type, a base layer of a second conductivity type provided on the collector layer, a first emitter structure of the first conductivity type provided on the base layer, and a second emitter structure of the first conductivity type and provided on the base layer, wherein the first and second emitter structures are doped with respect to the base layer, with a sufficiently high impurity concentration level such that a Zener breakdown occurs at the p-n junction formed between the base layer and the first or second emitters upon application of a reverse bias voltage.

Abstract: A semiconductor memory device comprises a non-doped thick barrier layer formed on the semiconductor substrate, an impurity doped floating conducting layer formed on the thick barrier layer, a thin barrier layer formed on the floating conducting layer and having an asymmetric barrier whose barrier height is higher on the side of the floating conducting layer, a channel layer formed on the thin barrier layer, and a first electrode and a second electrode formed on the channel layer. A write bias voltage which makes a potential of the second electrode higher than that of the first electrode is applied so as to inject electrons from the first electrode to the floating conducting layer through the thin barrier layer, thereby writing information in the floating conducting layer. A read bias voltage lower than the write bias voltage is applied between the first and the second electrodes, and the information stored in the floating conducting layer is read based on whether or not a current flows in the channel layer.

Abstract: A resonant-tunneling heterojunction bipolar transistor (RHBT) device having a superlattice structure and a PN junction. The RHBT includes an emitter layer; a base layer; a collector layer operatively facing the base layer to form a PN junction at the face between the base layer and the collector layer; and a superlattice structure including at least one quantum well defining a sub-band of energy at which carriers resonant-tunnel therethrough, formed at least in the emitter layer and operatively facing to the base layer.The RHBT has a differential negative resistance characteristics for realizing a variety of logic circuits and includes an electron resonance and a positive hole resonance, for which the generation condition is changeable in response to a mole fraction of material of the emitter layer.

Abstract: A high-speed semiconductor device comprising emitter potential barrier layer disposed between an emitter layer and a base layer, a collector layer, and a collector potential barrier layer disposed between the base layer and the collector layer. The collector potential barrier layer has a structure having a barrier height changing from a high level to a low level along the direction from the base layer to the collector layer, whereby, even when no bias voltage is applied between the collector layer and the emitter layer, a collector current can flow through the device.

Abstract: A resonant-tunneling heterojunction bipolar transistor (RHBT) device having a superlattice structure and a PN junction. The RHBT includes an emitter layer; a base layer; a collector layer operatively facing the base layer to form a PN junction at the face between the base layer and the collector layer; and a superlattice structure including at least one quantum well defining a sub-band of energy at which carriers resonant-tunnel therethrough, formed at least in the emitter layer and operatively facing to the base layer. The RHBT has a differential negative resistance characteristics for realizing a variety of logic circuits and includes an electron resonance and a positive hole resonance, for which the generation condition is changeable in response to a mole fraction of material of the emitter layer.

Abstract: A semiconductor device comprises stacked first through fifth semiconductor layers. The semiconductor device has an energy level condition of .vertline.Ec.sub.3 -Ec.sub.1 .vertline..apprxeq..vertline.Ev.sub.3 -Ev.sub.5 .vertline., where Ec.sub.3 is a resonant energy level of electrons in a conduction band of the third layer and Ev.sub.3 is a resonant energy level of holes in a valence band thereof, and Ec.sub.1 is an energy level of a conduction band of the first layer and Ev.sub.5 is an energy level of a valence band of the fifth layer.

Abstract: A resonant-tunneling heterojunction bipolar transistor (RHBT) device having a superlattice structure and a PN junction. The RHBT includes an emitter layer, a base layer, a collector layer facing the base layer to form a PN junction at the interface between the base layer and the collector layer, and a superlattice structure including at least one quantum well defining a sub-band of energy at which carriers resonant-tunnel therethrough. The superlattice is formed at least in the emitter layer and faces. The RHBT has a differential negative resistance characteristic for realizing a variety of logic circuits and includes an electron resonance and a positive hole resonance, for which the generation condition is changeable in response to a mole fraction of material of the emitter layer.

Abstract: A comparator circuit comprises a differential amplifier supplied with a reference signal and an input signal. A resonant-tunneling transistor has a base supplied with an output signal of the differential amplifier. A collector is connected to a first power supply source via a resistor. An emitter is connected to a second power supply source. Therefore, it is possible to simplify a circuit configuration of the comparator circuit and to improve an operation speed of the comparator circuit by outputting an output signal from a connection portion between the resistor and the collector of the transistor.