Patents by Inventor Kenichi Kado

Kenichi Kado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6232147
    Abstract: A semiconductor device equipped with secondary pads having adequate arrangement for an arbitrary packaging process. The secondary pads are connected with the primary pads of the semiconductor device with a novel lead wire structure, which is characterized by its low electric resistance, good mechanical strength to protect active components of the device, good adhesion to bumps, and anti-electromigration property.
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: May 15, 2001
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Kenichi Kado, Eiji Watanabe, Kazuyuki Imamura, Takahiro Yurino
  • Patent number: 6218281
    Abstract: A semiconductor substrate is prepared which has a principal surface, an exposed pad made of conductive material being formed in a partial area of the principal surface, and the other area of the principal surface being covered with a first insulating film. A base conductive film is formed on the first insulating film and the pad. A photoresist film having a thickness of 50 &mgr;m or thicker is formed on the base conductive film. An opening is formed through the photoresist film in an area corresponding to the pad to expose a partial surface area of the base conductive film. A conductive bump electrode is deposited on the base conductive film exposed on a bottom of the opening. The photoresist film is removed. This method is suitable for making a fine pitch between bump electrodes.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: April 17, 2001
    Assignee: Fujitsu Limited
    Inventors: Eiji Watanabe, Hirohisa Matsuki, Kenichi Kado, Kenichi Nagashige, Masanori Onodera, Kunio Kodama, Hiroyuki Yoda, Joji Fujimori, Minoru Nakada, Yutaka Makino
  • Patent number: 5969424
    Abstract: A semiconductor device equipped with secondary pads having adequate arrangement for an arbitrary packaging process. The secondary pads are connected with the primary pads of the semiconductor device with a novel lead wire structure, which is characterized by its low electric resistance, good mechanical strength to protect active components of the device, good adhesion to bumps, and anti-electromigration property.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: October 19, 1999
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Kenichi Kado, Eiji Watanabe, Kazuyuki Imamura, Takahiro Yurino