Patents by Inventor Kenichi Kasai
Kenichi Kasai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20090153103Abstract: A portable device is disclosed that includes a charge control circuit configured to control charging of a secondary battery included in a battery pack, the secondary battery being configured to supply power to the portable device; a temperature detection terminal at which the temperature of the secondary battery is detected from a temperature detection part of the battery pack; positive and negative power terminals to be connected to the battery pack; a control circuit configured to control the operation of the portable device; and an interface circuit connected between the temperature detection terminal and each of an input terminal of the charge control circuit and an input terminal of the control circuit, in which a signal detected at the temperature detection terminal is fed to each of the charge control circuit and the control circuit through the interface circuit.Type: ApplicationFiled: December 15, 2008Publication date: June 18, 2009Inventors: Akira Ikeuchi, Itsuki Nakano, Kenichi Kasai, Katsuya Suzuki, Kuniharu Suzuki
-
Publication number: 20090124299Abstract: Disclosed is a mobile terminal incorporating a battery pack utilized as power supply. The mobile terminal includes a positive terminal connected to a battery pack positive electrode, a negative terminal connected to a battery pack negative electrode, a data communication terminal communicating with a circuit in the battery pack, a charge control unit controlling charging of the battery pack via the positive terminal, and a reference voltage output unit outputting reference voltage. The terminal further includes a dividing resistor and a thermistor connected in series between the reference voltage output unit and the negative terminal, a temperature detector detecting temperature, and stopping charging of the battery pack based on the detected temperature, and a switching device controlling the voltage at the predetermined portion.Type: ApplicationFiled: October 31, 2008Publication date: May 14, 2009Applicants: SONY ERICSSON MOBILE COMMUNICATIONS JAPAN, INC., MITSUMI ELECTRIC CO., LTD.Inventors: Katsuya SUZUKI, Kuniharu SUZUKI, Akira IKEUCHI, Yoshihide MAJIMA, Hirotsugu IIJIMA, Kenichi KASAI, Takatoshi ITAGAKI
-
Publication number: 20090124298Abstract: Disclosed is a mobile phone terminal with a battery pack containing a retraceable battery as power supply, and transmitting and receiving radio-signals to and from a mobile phone system base transceiver station. The mobile phone terminal includes a data communication terminal communicating data with the battery pack, an intermittent receiving processor periodically carrying out intermittent receiving processing via the base transceiver station when the mobile phone terminal is in a standby operation, and a battery status determining unit transmitting, while the intermittent receiving processor is carrying out intermittent receiving processing, an activating signal to the battery pack via the data communication terminal and reading battery status data from the activated battery pack.Type: ApplicationFiled: October 31, 2008Publication date: May 14, 2009Applicants: SONY ERICSSON MOBILE COMMUNICATIONS JAPAN, INC., MITSUMI ELECTRIC CO., LTD.Inventors: Katsuya Suzuki, Kuniharu Suzuki, Akira Ikeuchi, Yoshihide Majima, Hirotsugu Iijima, Kenichi Kasai, Takatoshi Itagaki
-
Patent number: 7518233Abstract: A sealing structure for multi-chip modules stable in cooling performance and excelling in sealing reliability is to be provided. The under face of a frame 5 compatible with a wiring board 1 in thermal expansion rate is fixed with solder 8 to the face of the wiring board 1 for mounting semiconductor devices 2; a rubber O-ring 15 is placed between the upper face of the frame 5 and the under face of the circumference of an air-cooled: heat sink 7; the plastic member 6 making possible relative sliding is placed between the upper face of the circumference of the heat sink 7 and the upper frame 10; the upper face of a plastic member 6 is restrained with the inside middle stage of an upper frame 10; and the lower part of the upper frame 10 and the frame 5 are fastened together with bolts 9.Type: GrantFiled: June 9, 2000Date of Patent: April 14, 2009Assignees: Hitachi, Ltd., Hitachi Information Technology Co., Ltd.Inventors: Kouichi Takahashi, Kenichi Kasai, Takahiro Daikoku, Takayuki Uda, Toshitada Netsu, Takeshi Yamaguchi, Takahiko Matsushita, Osamu Maruyama
-
Patent number: 7153701Abstract: A method for quantitatively detecting an antigen which comprises (1) a first step of providing an Fab? antibody having a uniform isoelectric point, said antibody forming an immune complex with an antigen in an analytical sample and being modified by adding an amino acid sequence comprising a charged amino acid residue and by being labeled with a fluorescent dye, (2) a second step of mixing the Fab? antibody having a uniform isoelectric point with the analytical sample containing the antigen to obtain a mixture comprising the immune complex, (3) a third step of separating the mixture by performing electrophoresis in a carrier, (4) a fourth step of irradiating an excitation light which excites the fluorescent dye to the mixture separated in the third step to cause fluorescence in the immune complex, and (5) a fifth step of detecting the fluorescence.Type: GrantFiled: February 17, 2000Date of Patent: December 26, 2006Assignee: Hamamatsu Photonics K.K.Inventors: Sunao Hisada, Yukiko Ito, Hiroyuki Matsumoto, Kiyohito Shimura, Kenichi Kasai
-
Publication number: 20050239215Abstract: A method for quantitatively detecting an antigen which comprises (1) a first step of providing an Fab? antibody having a uniform isoelectric point, said antibody forming an immune complex with an antigen in an analytical sample and being modified by adding an amino acid sequence comprising a charged amino acid residue and by being labeled with a fluorescent dye, (2) a second step of mixing the Fab? antibody having a uniform isoelectric point with the analytical sample containing the antigen to obtain a mixture comprising the immune complex, (3) a third step of separating the mixture by performing electrophoresis in a carrier, (4) a fourth step of irradiating an excitation light which excites the fluorescent dye to the mixture separated in the third step to cause fluorescence in the immune complex, and (5) a fifth step of detecting the fluorescence.Type: ApplicationFiled: November 2, 2004Publication date: October 27, 2005Applicant: Hamamatsu Photonics K.K.Inventors: Sunao Hisada, Yukiko Ito, Hiroyuki Matsumoto, Kiyohito Shimura, Kenichi Kasai
-
Patent number: 6890799Abstract: According to the invention, a sealing top plate in a multi-chip module is formed from a ceramic with high thermal conductivity having a thermal expansion coefficient consistent with that of a multi-layer circuit substrate. A cooling flow path cover covering the entirety of cooling flow path grooves is formed as a separate metallic member. The back surface of the sealing top plate, on which are formed the cooling flow path grooves, is bonded directly to the back surface of a semiconductor device using solder. A thermal-conductive jacket with low thermal resistance is provided. A multi-chip module sealing frame is soldered to the edge of the sealing top plate. Furthermore, a sealing material such as an O-ring is simply interposed between the edge of the sealing top plate and the cooling water path cover, and tightening means is used to tighten the metallic cooling flow path cover and the multi-chip module sealing frame to each other.Type: GrantFiled: January 7, 2003Date of Patent: May 10, 2005Assignee: Hitachi, Ltd.Inventors: Takahiro Daikoku, Kenichi Kasai, Toshitada Netsu, Koichi Koyano, Takayuki Uda
-
Publication number: 20030103333Abstract: According to the invention, a sealing top plate in a multi-chip module is formed from a ceramic with high thermal conductivity having a thermal expansion coefficient consistent with that of a multi-layer circuit substrate. A cooling flow path cover covering the entirety of cooling flow path grooves is formed as a separate metallic member. The back surface of the sealing top plate, on which are formed the cooling flow path grooves, is bonded directly to the back surface of a semiconductor device using solder. A thermal-conductive jacket with low thermal resistance is provided. A multi-chip module sealing frame is soldered to the edge of the sealing top plate. Furthermore, a sealing material such as an O-ring is simply interposed between the edge of the sealing top plate and the cooling water path cover, and tightening means is used to tighten the metallic cooling flow path cover and the multi-chip module sealing frame to each other.Type: ApplicationFiled: January 7, 2003Publication date: June 5, 2003Applicant: Hitachi, Ltd.Inventors: Takahiro Daikoku, Kenichi Kasai, Toshitada Netsu, Koichi Koyano, Takayuki Uda
-
Patent number: 6528878Abstract: According to the invention, a sealing top plate in a multi-chip module is formed from a ceramic with high thermal conductivity having a thermal expansion coefficient consistent with that of a multi-layer circuit substrate. A cooling flow path cover covering the entirety of cooling flow path grooves is formed as a separate metallic member. The back surface of the sealing top plate, on which are formed the cooling flow path grooves, is bonded directly to the back surface of a semiconductor device using solder. A thermal-conductive jacket with low thermal resistance is provided. A multi-chip module sealing frame is soldered to the edge of the sealing top plate. Furthermore, a sealing material such as an O-ring is simply interposed between the edge of the sealing top plate and the cooling water path cover, and tightening means is used to tighten the metallic cooling flow path cover and the multi-chip module sealing frame to each other.Type: GrantFiled: August 4, 2000Date of Patent: March 4, 2003Assignee: Hitachi, Ltd.Inventors: Takahiro Daikoku, Kenichi Kasai, Toshitada Netsu, Koichi Koyano, Takayuki Uda
-
Patent number: 6351384Abstract: A multi-chip module cooling device is provided which equally and efficiently reduces the rises in temperature of LSI chips, and which is superior in the productivity of multi-chip modules, such as their capability to be assembled and disassembled. A multi-chip module includes semiconductor devices and a sealing top plate for removing the heat generated by them. The sealing top plate has a number of parallel cooling channels and a number of cross grooves extending partially across the cooling channels. The cooling channels arc covered with a cooling channel cover, which is provided with turbulent promoters on an inner wall thereof. When the cooling channel cover is placed over the sealing top plate, the turbulent promoters engage with the cross grooves. The turbulent promoters are positioned midway between adjacent semiconductor devices.Type: GrantFiled: August 11, 2000Date of Patent: February 26, 2002Assignee: Hitachi, Ltd.Inventors: Takahiro Daikoku, Junri Ichikawa, Atsuo Nishihara, Kenichi Kasai
-
Patent number: 6213786Abstract: A multi-pin connector has contact pins fixedly soldered into bottomed connection holes which are in desired positions on a printed board, so that the contact pins are arrayed in a desired form without a housing. The multi-pin connector can be manufactured in a short period of time and can have any pitch, any number of pins and any shape.Type: GrantFiled: August 3, 2000Date of Patent: April 10, 2001Assignee: Hitachi, Ltd.Inventors: Kiyoshi Matsui, Takayuki Ono, Kenichi Kasai, Tsutomu Imai, Morio Suzuki, Hideyuki Fukasawa, Mitugu Shirai, Toshitaka Murakawa, Takeji Siokawa, Takeshi Kuroda
-
Patent number: 6132221Abstract: A multi-pin connector for mounting other boards or electronic parts on a main board, has contact pins fixedly soldered into bottomed connection holes which are in desired positions on the main board, so that the contact pins are secured separately and arrayed in a desired form without a housing. The contact pins have contact portions and pin portions, with the pin portions being secured in the connection holes.Type: GrantFiled: April 22, 1998Date of Patent: October 17, 2000Assignee: Hitachi, Ltd.Inventors: Kiyoshi Matsui, Takayuki Ono, Kenichi Kasai, Tsutomu Imai, Morio Suzuki, Hideyuki Fukasawa, Mitugu Shirai, Toshitaka Murakawa, Takeji Siokawa, Takeshi Kuroda
-
Patent number: 5959351Abstract: There is disclosed a liquid-cooled electronic device. Semiconductor devices are mounted on a substrate of a semiconductor module immersed in a cooling liquid. A wire-like member is provided in the vicinity of a cooling medium ejection port of each cooling medium supply member which cools a respective one of the semiconductor devices by a jet of the cooling liquid. With this arrangement, the flow of the cooling liquid downstream of the wire-like member is disturbed to promote the boiling over the entire surface of the semiconductor device, and when the semiconductor device is to be cooled, a transient temperature rise is reduced at the time of starting the energization of the semiconductor device, thereby stabilizing the temperature of the semiconductor device.Type: GrantFiled: August 9, 1993Date of Patent: September 28, 1999Assignee: Hitachi, Ltd.Inventors: Shigeyuki Sasaki, Tadakatsu Nakajima, Noriyuki Ashiwake, Yasuo Ohsone, Toshio Hatada, Toshiki Iino, Akio Idei, Kenichi Kasai
-
Patent number: 5926375Abstract: A circuit board is provided with blind connection vias which are filled with solder. The end portions of the pins of an electronic component are inserted into the connection vias, and are connected to the connection vias by solder. The electronic component is surface mounted on the circuit board with the major portions of the pins exposed.Type: GrantFiled: April 3, 1996Date of Patent: July 20, 1999Assignee: Hitachi, Ltd.Inventors: Hideki Watanabe, Tsutomu Imai, Takeshi Yamaguchi, Tositada Netsu, Kenichi Kasai, Fumio Imahashi, Satoru Ezaki, Mitugu Shirai
-
Patent number: 5888106Abstract: A pin contact of a connector includes a parallel portion which touches a contact portion of a contact spring portion of a socket contact when the pin contact is fitted into the socket contact, and an inclined portion to be inserted into the contact spring portion while forcibly opening the contact spring portion at the time of insertion. The inclined portion has a shape which is a combination of a curve portion and a linear portion, the curve portion being moderate in inclination in the area of a boundary point between the curve portion and the parallel portion while sharp in inclination in the area of a contact start point at a pointed end of the contact pin contact. The linear portion has a constant inclination angle.Type: GrantFiled: November 27, 1995Date of Patent: March 30, 1999Assignee: Hitachi, Ltd.Inventors: Takayuki Ono, Toshiaki Fujino, Kiyoshi Matsui, Kenichi Kasai, Morio Suzuki
-
Patent number: 5866683Abstract: Provided are isoelectric point(pI) markers for isoelectric focusing with fluorescence detection. The markers are fluorescence-labeled oligopeptides which comprise a fluorescence dye bonded chemically to the amino group of N-terminal amino acid of oligopeptide. The marker shows its unique and narrow pI band(peak) in electrophoresis or isoelectric focusing. The markers can be designed to have appropriate pI value, and cover wide range of pI (3<pI<11). Further, the markers have good storage stability. The markers can be preferably applied to the capillary isoelectric focusing with fluorescence detection due to their sharp and narrow band with strong emitted fluorescence.Type: GrantFiled: March 29, 1996Date of Patent: February 2, 1999Assignee: Laboratory of Molecular BiophotonicsInventors: Kiyohito Shimura, Kenichi Kasai, Hiroyuki Matsumoto, Hisayoshi Takamoto
-
Patent number: 5844311Abstract: There is disclosed a multichip module having a sealing-cooling structure which achieves a high packaging density, high sealing-connection reliability, a low manufacturing cost and a high cooling ability. A frame 15, conforming in thermal expansion coefficient to a substrate 11, is soldered at one surface thereof to that surface of the substrate 11 on which semiconductor devices 12 are mounted. The frame 15 is fastened or fixedly secured at the other surface thereof to a lid member 17 by bolts 10 or means without any heat treatment of the whole of the module.Type: GrantFiled: November 17, 1997Date of Patent: December 1, 1998Assignee: Hitachi, Ltd.Inventors: Hideki Watanabe, Kenichi Kasai, Tositada Netsu, Hiroyuki Hidaka, Osamu Yamada, Mitsunori Tamura
-
Patent number: 5774334Abstract: Semiconductor devices are fixed on a substrate by solder and a semiconductor module having an enclosed structure is formed by the substrate, flanges and a housing. Two groups of heat conducting members, each having fins respectively in contract with the semiconductor devices and an inner wall of the housing are attached to the semiconductors. A fin thickness of each fin of the two groups of heat conducting members is comparatively thick, a fin height is low and the respective fins of the respective opposed heat conducting members have with very small clearances therebetween. A liquid as a heat conducting medium is enclosed in the semiconductor module. The liquid level of the semiconductor module is controlled such that it contacts a uppermost semiconductor device in the semiconductor module in a vertical arrangement. Further, valve mechanisms for introducing and removing a cooling fluid are provided at a top face and a bottom face of a space formed in the semiconductor module.Type: GrantFiled: August 28, 1995Date of Patent: June 30, 1998Assignee: Hitachi, Ltd.Inventors: Keizo Kawamura, Noriyuki Ashiwake, Takahiro Daikoku, Akio Idei, Kenichi Kasai, Hideyuki Kimura, Atsuo Nishihara, Toshio Hatada, Shigeyuki Sasaki
-
Patent number: 5751062Abstract: A cooling device of a multi-chip module has micropackages that are independent of thermal deformation and easy to assembly and disassembly. The multi-chip module includes a multi-layer substrate on which the micropackages, each encasing an LSI chip, are mounted, and a housing formed integrally with a cooler. Each of the micropackages includes a first heat conduction member, having a cap portion for receiving the LSI chip and a first fin made of the same material as the cap portion to be integral therewith, and a substrate fixed to the cap portion of the first heat conduction member, the LSI chip being mounted on the substrate which is securely fixed to the cap portion of the heat conduction member while being fixedly joined at the back surface thereof to an inner surface of the cap portion of the first heat conduction member. Second heat conduction members, each including a base portion and a second fin, are disposed to engage with the first fins and be pressed against the cooler by a spring, respectively.Type: GrantFiled: December 13, 1995Date of Patent: May 12, 1998Assignee: Hitachi, Ltd.Inventors: Takahiro Daikoku, Fumiyuki Kobayashi, Noriyuki Ashiwake, Kenichi Kasai, Keizou Kawamura, Akio Idei
-
Patent number: 5743009Abstract: Ends of contact pins are inserted into bottomed connection holes which are in desired positions on a printed board, so that the contact pins are arrayed in the desired form. By effecting solder reflow in this state, the contact pins are fixedly soldered to the connection holes. A multi-pin connector is thus provided, which can be manufactured with ease in a short period of time and which can have any pitch, any number of pins and any shape.Type: GrantFiled: April 4, 1996Date of Patent: April 28, 1998Assignee: Hitachi, Ltd.Inventors: Kiyoshi Matsui, Takayuki Ono, Kenichi Kasai, Tsutomu Imai, Morio Suzuki, Hideyuki Fukasawa, Mitugu Shirai, Toshitaka Murakawa, Takeji Siokawa, Takeshi Kuroda